Fast voltage equilibration of differential data lines

Details Fast voltage equilibration of differential data lines Fast voltage equilibration of differential data lines

1995-05-09

1996-08-13

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

36518907, 36518909, 365203, 365207, G11C 1300

Patent

active

055463380

ABSTRACT:
A method and a circuit for fast equilibration of complementary data lines in memory circuit following a write cycle. The circuit of the present invention separately controls the on/off timing of pull-up and pull-down transistors coupled to the data lines to obtain faster equilibration. In one embodiment incorporating an equilibration transistor between the data lines, the pull-up transistor coupled to the high data line is momentarily turned off after a write cycle, to allow the voltage on the high data line to drop all the way down to the voltage on the recovering low data line to reduce equilibration delay.

REFERENCES:
patent: 4689771 (1987-08-01), Wang et al.
patent: 5121356 (1992-06-01), Park et al.
patent: 5250854 (1993-10-01), Lien
patent: 5418748 (1995-05-01), Monden

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