Fast unaligned memory access system and method

Details Fast unaligned memory access system and method Fast unaligned memory access system and method

2007-11-13

2007-11-13

Thai, Tuan V. (Department: 2186)

Electrical computers and digital processing systems: memory

Address formation

Slip control, misaligning, boundary alignment

C711S154000, C711S202000

Reexamination Certificate

active

10777570

ABSTRACT:
A microprocessor system includes an address generator, an address selector, and memory system having multiple memory towers, which can be independently addressed. The address generator simultaneously generates a first memory address and a second memory address that is 1 row greater than the first memory address. The address selector determines whether the row portion of the first memory address or the second memory address is used for each memory tower. Because each tower can be addressed independently, a single memory access can be used to access data spanning multiple rows of the memory system.

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