Fast synchronization of asynchronous signals with a synchronous

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 94, 364DIG1, 3642709, 364DIG2, 364950, 3649501, H03K 513, H03K 5135, H03K 19003

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054871638

ABSTRACT:
A method and apparatus provides fast synchronization of asynchronous signals to use by a synchronously operated device by quantizing the delay of an input clocked bistable device which receives and stores the asynchronous signal in response to a first synchronous clock pulse so that such input clocked bistable device has a metastable time period which is less than a predetermined maximum delay period. The output signal of the input clocked bistable device is connected directly to as an input to an asynchronously operated logic circuit part selected to provide a resulting output signal corresponding to the result of performing a logical operation on the output signal within a predetermined minimum time period. The resulting output signal is directly applied to the input of another synchronously operated bistable device which stores the resulting output signal in response to the next occurring synchronous clock pulse corresponding to a time period which is greater than the time of the metastable time period, minimum delay of the logic part and preset of time of such bistable device.

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Patterson D. A., "Computer Architecture--A Quantitative Approach", Calif. 1990 pp. 253-255.

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