Fast-switching logic gate

Details Fast-switching logic gate Fast-switching logic gate

1997-08-27

1999-11-02

Santamauro, Jon

Electronic digital logic circuitry

Accelerating switching

326 98, 326121, H03K 19017, H03K 19096

Patent

active

059777893

ABSTRACT:
A logic device that allows the implementation of a fast-switching logic gate is described. One implementation of the logic device includes an output node and a reference node electrically isolated from one another by a transmission gate. During a first period of time, the nodes are charged to complementary logic levels. During a second period of time, the transmission gate is enabled, allowing the charge on the nodes to be redistributed. A pair of complementary input terminals are connected to the reference and output nodes, such that if the input terminal connected to the output node is at the same logic level as the output node during the first period, then the voltage level of the output node is pulled back from its redistributed state to its original state. However, if the input terminal voltage level to the output node is the complement of the original voltage level of the output node, then a charge/discharge circuit is enabled to pull the output node to a voltage level that is a complement to its original voltage level.

REFERENCES:
patent: 4804867 (1989-02-01), Okitaka et al.
patent: 5646557 (1997-07-01), Runyon et al.
patent: 5854567 (1998-12-01), Meier et al.
Friedman et al., "Dynamic Logic CMOS Circuits," IEEE Journal of Solid-State Circuits, vol. SC-19, No. 2, pp. 263-266 (1984).
Heller et al., "Cascode Voltage Switch Logic: A Differential CMOS Logic Family," Proceedings of 1984 IEEE International Solid State Circuits Conference, pp. 16-17 (1984).
Krambeck et al., "High-Speed Compact Circuits with CMOS," IEEE Journal of Solid-State Circuits, vol. SC-17, No. 3, pp. 614-619 (1982).

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