Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop
Reexamination Certificate
2007-10-10
2008-12-02
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Sequential or with flip-flop
C326S052000, C327S144000
Reexamination Certificate
active
07459936
ABSTRACT:
A fast/slow state machine latch is provided that generates fast and slow select signals for a single toggle, low power multiplexer circuit. In accordance with an embodiment of the present invention, the fast/slow state machine latch includes a first latch with a delayed output, a second latch with an undelayed output, an inverter for coupling the delayed output of the first latch to an input of the second latch, and an exclusive-OR (XOR) gate coupled to the delayed output of the first latch and a data input, an output of the XOR gate coupled to an input of the first latch. A method for incorporating low power multiplexer circuits into a circuit design with minimal input from a circuit designer is also provided.
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Bell Richard R.
Skipwith Wilson D.
Ventrone Sebastian T.
Barnie Rexford
Crawford Jason
Hoffman Warnick LLC
International Business Machines - Corporation
LeStrange Michael
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