Fast sensing scheme for floating-gate memory cells

Details Fast sensing scheme for floating-gate memory cells Fast sensing scheme for floating-gate memory cells

2007-04-17

2007-04-17

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S205000, C365S185250

Reexamination Certificate

active

10787911

ABSTRACT:
Sensing circuits are adapted for faster sensing of a programmed state of a floating-gate memory cell. The sensing circuits include a first precharging path for applying a first precharge potential to the input node of a sensing device for precharging bit lines prior to sensing the programmed state of the floating-gate memory cell. The sensing circuits further include a second precharging path for applying a second precharge potential to a target global bit line for precharging bit lines prior to sensing the programmed state of the floating-gate memory cell. The second precharging path is activated during only a portion of the precharging phase of a sensing operation to bring the bit lines rapidly up toward an asymptotic potential level. The second precharging path is thus deactivated prior to deactivating the first precharging path.

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