Fast program mode for non-volatile memory

Details Fast program mode for non-volatile memory Fast program mode for non-volatile memory

1999-04-14

2000-09-26

Dinh, Son T.

Static information storage and retrieval

Floating gate

Particular biasing

36518523, 36518529, 36518533, G11C 1604

Patent

active

061250562

ABSTRACT:
A method for fast programming of non-volatile memory cells in a non-volatile memory array comprises the steps of providing an acceleration voltage greater than the internal pump voltage supplied by a conventional internal drain pump, providing a program write command, and coupling the acceleration voltage to provide a programming current to all of the bit lines selected to be programmed at a time. In an embodiment, the acceleration voltage is reduced to a drain voltage before it is applied to the drains of the memory cells. In an embodiment in which the flash memory cells comprise typical dual-gate NOR devices, the acceleration voltage is in the range of about 7 V to about 10 V, and the drain voltage is on the order of about 5 V. The sources of the memory cells are grounded during the fast programming operation. In a further embodiment, the method further comprises the steps of detecting the acceleration voltage, generating an acceleration voltage indicator signal in response to the presence of the acceleration voltage, and generating a fast program write command in response to the acceleration voltage indicator signal and the program write command to set the flash memory cells in a fast program mode.

REFERENCES:
patent: 5442586 (1995-08-01), Javanifard et al.
patent: 5805499 (1998-09-01), Haddad
patent: 5821909 (1998-10-01), Yiu et al.
patent: 6009022 (1999-12-01), Lee et al.

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