Fast process context switching buffer

Details Fast process context switching buffer Fast process context switching buffer

2000-11-29

2003-10-14

Gaffin, Jeffrey (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

C710S007000, C710S008000, C710S020000, C710S021000, C710S310000

Reexamination Certificate

active

06633928

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to computer system hardware buffers, and, more particularly, to configuration control of the hardware via such buffers.
BACKGROUND OF THE INVENTION
Modern computer systems are capable of running multiple parallel processes in which each process may need to use the same hardware resources. As a result processes often have to wait in line with other competing processes to obtain access to hardware resources. The speed at which a given process performs its function can be increased if an intermediate storage, referred to as a buffer, is used to hold instructions, which typically is comprised of commands and data, which the process sends to a particular hardware device. The process then can continue performing its other required tasks, which may include writing data into other buffers attached to other hardware devices or into the buffer it would otherwise be waiting for. Each active hardware device that the computer controls typically has one or more blocks of memory assigned to serve as a buffer. Without buffers, a process would have to first wait until it had access to the hardware device, and then once access is obtained, it would wait until the hardware device had completed the service it requested of it. As a simple example, if a process outputs data to both a floppy disk and a printer, buffers allow the process to effectively perform both functions in parallel rather serially.
In order to reduce the overhead associated with the transfer of data from the buffer to the hardware device, the full set of instructions in the buffer, which is referred to herein as a buffer data set, is sent to the hardware device as a single unit. The contents of the buffer itself may vary in size, but nothing smaller than its full contents are sent to the hardware.
When sending data to a hardware device from multiple buffers as might occur, for example in a multiprocessing environment such as a UNIX operating system, a process must insure that the configuration for the hardware device is current. If the process loses exclusive access for the device between the time that it sends a first set of instructions from a buffer and the time that it sends a second set, the current configuration must be downloaded to the device before the second set of data is sent. It is often difficult to maintain an accurate description of the hardware configuration as various buffer data sets are downloaded.
As an example, suppose that a process wishes to first clear a background buffer of a graphics card, then draw a triangle in the background buffer, and finally transfer the contents of the background buffer to the foreground buffer for display on a monitor. Also, suppose that the clear buffer command requires configuration X, the draw triangle command requires configuration Y, and the transfer buffer contents command requires configuration Z. It is possible that one or more of these commands requires more than one buffer's full of instructions to complete the command. If another process gains exclusive access to the graphics card before or during the completion of these commands, the configuration of the card will be changed to an unknown state when the first process finally regains control. Thus, the first process will need to reset the hardware to the needed configuration which might be configuration X, Y, or Z depending upon previous buffer transfers. It is imperative than the first process maintain knowledge of the configuration in which it left the graphics card. But, this is not an easy thing to do as the process has most likely continued on beyond these commands. Thus, the process can have great difficulty in maintaining knowledge of exactly which configuration the hardware is in at the various stages of buffer transfer.
In fact, previous solutions have not permitted instructions with different configurations to share the same data buffer. Thus, whenever the configuration associated with the instructions changed, it was necessary to send whatever was in the current data buffer down to the hardware. Since configuration changes typically occur often, this method results in numerous emptying of the buffer. The overhead associated with sending small amounts of data down to the hardware device makes this method very inefficient.
Thus there is a need for a low overhead technique which would permit instructions with different configurations to share the same data buffer.
SUMMARY OF THE INVENTION
The present patent document relates to a novel method for maintaining control of the configuration of a hardware device even when multiple processes are accessing the same device. Previous methods for maintaining such control over the hardware configuration have relied upon emptying the buffer associated with the hardware device or upon reading the configuration back from the hardware device.
In representative embodiments of the present patent document, methods are disclosed which permit (1) a given configuration to span exclusive access to the hardware device by other processes and (2) different configurations to share the same data buffer. Current configuration of the hardware device is maintained by always placing the current configuration at the beginning of the data buffer. Whenever a new set of data is written into the buffer, the current configuration is placed at the beginning of the buffer. This first entry comprising the current configuration is the header of the buffer's data. All subsequent instructions will follow this header, as will any subsequent modifications to the devices' configuration. Since instructions contained in the buffer are to be executed sequentially, the device will always be set to the correct configuration, even when exclusive access between different data sets of the buffer is lost. Because the header is written when a new data set is started and not when the data set is sent down to the device, the header will never be out of date with respect to the data that follows it.
The size of the header should be small when compared to the overall size of the buffer so that the overhead of creating the header can be amortized across the time it takes to actually fill up the buffer with instructions. In addition, if the header is too large, the buffer will need to be emptied more often, reducing the benefits of the header.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.


REFERENCES:
patent: 5566349 (1996-10-01), Trout
patent: 5581728 (1996-12-01), Moritomo
patent: 5784649 (1998-07-01), Begur et al.
patent: 6216015 (2001-04-01), Hymel
patent: 6260169 (2001-07-01), Massoudi
patent: 6392654 (2002-05-01), Gallotta et al.
patent: 6442627 (2002-08-01), Negishi et al.
patent: 6496869 (2002-12-01), Cheng

Affiliated with

Also associated with

Rating

Fast process context switching buffer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fast process context switching buffer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fast process context switching buffer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3153631