Fast on-chip decoupling capacitance budgeting method and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000, C703S013000, C703S014000

Reexamination Certificate

active

07571404

ABSTRACT:
A semiconductor power network decoupling capacitance (decap) budgeting problem is formulated to minimize the total decap to be added to the network subject to voltage constraints on the network nodes of a semiconductor circuit design. Voltage constraints on the decap to be added are taken into consideration such that the decap can be distributed throughout a hot spot region of the semiconductor circuit design and not be limited to placement at a single location in the circuit. Dynamic network voltages are at all times maintained greater than a user-specified threshold voltage level.

REFERENCES:
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patent: 6532439 (2003-03-01), Anderson et al.
patent: 7302664 (2007-11-01), Haridass et al.
Haihua Su et al., An Algorithm for Optimal Decoupling Capacitor Sizing and Placement for Standard Cell Layouts, ISPD, Apr. 7-10, 2002, pp. 68-73, San Diego, CA, ACM.
Jingjing Fu et al., A Fast Decoupling Capacitor Budgeting Algorithm for Robust On-Chip Power Delivery, ASP-DAC, pp. 1-6.
Kai Wang et al., On-chip Power Supply Network Optimization using Multigrid-based Technique, DAC, pp. 113-118, Jun. 2-6, 2003, Anaheim, California, ACM.
Hang Li et al., Partitioning-Based Approach to Fast On-Chip Decap Budgeting and Minimization, DAC, pp. 170-175, Jun. 13-17, 2005, Anaheim, California, ACM.
Zhenyu Qi et al., On-Chip Decoupling Capacitor Budgeting by Sequence of Linear Programming, 6th International Conference on ASIC, 2005.
Shiyou Zhao et al., Decoupling Capacitance Allocation for Power Supply Noise Suppression, ISPD, Apr. 1-4, 2001, Sonoma, California, ACM.
Haihua Su et al., An Algorithm for Optimal Decoupling Capacitor Sizing and Placement for Standard Cell Layouts, ISPD, Apr. 7-10, 2002, pp. 68-73, San Diego, CA, ACM.
Jingjing Fu et al., A Fast Decoupling Capacitor Budgeting Algorithm for Robust On-Chip Power Delivery, ASP-DAC, pp. 1-6. 2004, IEEE.
Kai Wang et al., On-chip Power Supply Network Optimization using Multigrid-based Technique, DAC, pp. 113-118, Jun. 2-6, 2003, Anaheim, California, ACM.
Hang Li et al., Partitioning-Based Approach to Fast On-Chip Decap Budgeting and Minimization, DAC, pp. 170-175, Jun. 13-17, 2005, Anaheim, California, ACM.
Zhenyu Qi et al., On-Chip Decoupling Capacitor Budgeting by Sequence of Linear Programming, 6th International Conference on ASIC, 2005.
Shiyou Zhao et al., Decoupling Capacitance Allocation for Power Supply Noise Suppression, ISPD, Apr. 1-4, 2001, Sonoma, California, ACM.

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