Fast IDE drive to drive transfers

Details Fast IDE drive to drive transfers Fast IDE drive to drive transfers

1997-05-29

2000-08-22

Auve, Glenn A.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

710 22, 710 29, G06F 1300

Patent

active

061087246

ABSTRACT:
A data transfer system that relieves the central processing unit of a personal computer of the burden of controlling data transfers between mass storage devices coupled to a single device controller without utilizing main memory and which also increases the speed of such transfers. The data transfer system works with a computer having a DMA chip by causing the data to be stored in a transfer buffer instead of main memory when the device controller transfers data between the mass storage devices. The data transfer system also enables a data mirroring system for a personal computer by writing the data to the transfer buffer and also to a third mass storage device acting as a backup device. Another aspect of the data transfer system operates in computers having a local bus that couples peripherals to a central processing unit/main memory subsystem through a system controller. Data transfer logic executes in the system controller to decouple the central processing unit/main memory subsystem from the local bus while the data is transferred between the first and second mass storage devices under the control of the device controller.

REFERENCES:
patent: 5175825 (1992-12-01), Starr
patent: 5175864 (1992-12-01), Tairaku et al.
patent: 5193149 (1993-03-01), Awiszio et al.
patent: 5249279 (1993-09-01), Schmenk et al.
patent: 5398324 (1995-03-01), Matida et al.
patent: 5418925 (1995-05-01), DeMoss et al.
patent: 5440716 (1995-08-01), Schultz et al.
patent: 5535414 (1996-07-01), Burge
patent: 5615133 (1997-03-01), Gillard et al.
patent: 5732279 (1998-03-01), Wood et al.
"82C37A Device Characteristics", Website : http://support.intel.com/support/controllers/peripheral/8260.htm, (1998).
"82C37A-5 CHMOS High Performance Programmable DMA Controller", Intel Spec Cover Sheet.
"PCI Brochure", Revision 2.01, 37-49.

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