Fast error detection system and related methods

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S759000

Reexamination Certificate

active

07865808

ABSTRACT:
A system apparatus and method generates a communications signal having an error detection mechanism. A circuit generates a data packet. An encoder multiplies and accumulates data words with values in a distance table containing non-repeated n-bit multipliers having “m” number of one bits that are set to obtain accumulated sum bits and appends the accumulated sum bits to the data packet as an error detection code to form a communications signal to be transmitted.

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patent: 6836869 (2004-12-01), Wyland
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patent: 2006/0179273 (2006-08-01), Cole et al.
Filipg: “A Painless Guide to CRC Error Detection Algorihms Index V3.00” Internet Citation [Online] Sep. 24, 1996, pp. 1-33, XP00217899 Retrieved from the Internet: URL http://www.repairfaq.org/filipg/link/f—crc—v3.html> [retrieved on Jul. 16, 2001].

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