Fast equalizer training and frame synchronization algorithms for

Pulse or digital communications – Synchronizers

Patent

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Details

375222, H04L 700

Patent

active

060211679

ABSTRACT:
A modem selectively operated in the voice and higher frequency band which supports multiple line codes. The modem uses a digital signal processor so that different existing ADSL line codes can be implemented on the same hardware platform. The modem negotiates in real-time for a desired line transmission rate to accommodate line condition and service-cost requirement. The line code and rate negotiation process may be implemented at the beginning of each communication session through the exchange of tones between the modems. A four-step MDSL modem initialization process is provided for line code and rate compatibility. A synchronization startup procedure for DMT based MDSL modems is provided. The handshake protocol and receiver algorithm allow reliable standard telephone twisted-pair wire. The algorithm makes use of a short length sequence to train a synchronizing equalizer at the receiver. After training to this sequence, a matched filter or correlator is used to detect the inverted sync sequence. The detection of the inverted sequence signals the start of the normal reference training of the DMT equalizers. The MDSL line connection management process provides a simple, efficient, and flexible interface to manage the line connection between MDSL-C and MDSL-R in the telecommunication WAN environment. An internal state machine in an MDSL modem records and monitors the line status and notifies the state change to the other MDSL and also to the host processor. The protocol used for exchanging line connection management messages is a simplified LCP for MDSL.

REFERENCES:
patent: 5625651 (1997-04-01), Cioffi

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