Fast deposition on spherical-shaped integrated circuits in...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...

Reexamination Certificate

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C427S248100, C427S255290, C118S716000, C118S724000, C118S725000

Reexamination Certificate

active

06303517

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates generally to semiconductor integrated circuits, and more particularly, to an apparatus and method for fabricating a spherical-shaped semiconductor device.
Conventional integrated circuits, or “chips,” are formed from a flat surface semiconductor wafer. The semiconductor wafer is first manufactured in a semiconductor material manufacturing facility and is then provided to a fabrication facility. At the latter facility, several layers are processed onto the semiconductor wafer surface. Once completed, the wafer is then cut into one or more chips and assembled into packages. Although the processed chip includes several layers fabricated thereon, the chip still remains relatively flat.
A fabrication facility is relatively expensive due to the enormous effort and expense required for creating flat silicon wafers and chips. For example, manufacturing the wafers requires several high-precision steps including creating rod-form single crystal semiconductor material; precisely cutting ingots from the semiconductor rods; cleaning and drying the cut ingot sections; manufacturing a large single crystal from the ingots by melting them in a quartz crucible; grinding, etching, and cleaning the surface of the crystal; cutting, lapping and polishing wafers from the crystal; and heat processing the wafers. Moreover, the wafers produced by the above processes typically have many defects which are largely attributable to the difficulty in making a single, highly pure crystal due to the above cutting, grinding and cleaning processes as well as due to the impurities, including oxygen, associated with containers used in forming the crystals. These defects become more and more prevalent as the integrated circuits formed on these wafers become smaller.
Another major problem associated with modern fabrication facilities for flat chips is that they require extensive and expensive equipment. For example, dust-free clean rooms and precisely-controlled manufacturing and storage areas are necessary to prevent the wafers and chips from defecting and warping. Also, these types of fabrication facilities suffer from a relatively inefficient throughput as well as an inefficient use of the silicon. For example, facilities using in-batch manufacturing, where the wafers are processed by lots, must maintain huge inventories to efficiently utilize all the equipment of the facility. Also, because the wafers are round, and the completed chips are rectangular, the peripheral portion of each wafer cannot be used.
Still another problem associated with modern fabrication facilities is that they do not produce chips that are ready to use. Instead, there are many additional steps that must be completed, including cutting and separating the chip from the wafer; assembling the chip to a lead frame which includes wire bonding, plastic or ceramic molding and cutting and forming the leads, positioning the assembled chip onto a printed circuit board; and mounting the assembled chip to the printed circuit board. The cutting and assembly steps introduce many errors and defects due to the precise requirements of such operations. In addition, the positioning and mounting steps are naturally two-dimensional in character, and therefore do not support curved or three dimensional areas.
Therefore, due to these and various other problems, only a few companies in the world today can successfully manufacture conventional flat chips. Furthermore, the chips must bear a high price to cover the costs of manufacturing, as well as the return on initial capital and investment.
In co-pending U.S. patent application Ser. No. 08/858,004 filed on May 16, 1997, assigned to the same assignee as the present application and hereby incorporated by reference, a method and apparatus for manufacturing spherical-shaped semiconductor integrated circuit devices is disclosed. The present invention is specific to an apparatus and method for efficiently depositing thin films on the surface of the spherical shaped devices.
SUMMARY OF THE INVENTION
The present invention, accordingly, provides an apparatus and method for efficiently depositing thin films on the surface of a device such as a spherical shaped devices. To this end, one embodiment provides an enclosure containing a plurality of apertures and a conductor coil. The apertures connect to conduits for inputting and outputting the devices as well as injecting and releasing different inert gases and chemical precursors for chemical vapor deposition. A chamber is formed within the enclosure and is configured to be coaxial with the conductor coil.
Devices move through the input conduit where they are preheated by a resistance-type furnace. The preheated devices then move into the chamber where the chemical precursors are added for the chemical vapor deposition process. The devices are then further heated to a predefined temperature associated with the chemical precursors, by radio frequency energy from the conductor coil. At this time, the chemical precursors react with the heated device thereby growing a thin film on its outer surface.
In one embodiment, the device moves through the chamber responsive to a process gas flowing in a direction opposite to the direction of the device. In this way, the speed of the device through the chamber can be controlled.
Several advantages result from the foregoing. For one, the process gases can treat the spheres in several manners including depositing a thin film on the spheres. Also, the spheres can be continuously introduced into the chamber to facilitate a pipeline production process. Further, the method of the present invention can be carried out in a relatively small space, thereby reducing or eliminating the need for a clean room environment.


REFERENCES:
patent: Re. 31473 (1983-12-01), Kilby et al.
patent: 4749615 (1988-06-01), Bonny et al.
patent: 5223452 (1993-06-01), Knepprath
patent: 5278097 (1994-01-01), Hotchkiss et al.
patent: 5462639 (1995-10-01), Matthews et al.
patent: 5571366 (1996-11-01), Ishii et al.
patent: 6015764 (2000-01-01), Xia
patent: 6053123 (2000-04-01), Xia
patent: 02-119241 (1988-10-01), None

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