Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
2009-06-30
2011-10-11
Trimmings, John (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
C714S005110, C714S025000, C714S036000, C714S042000, C714S043000, C714S047300, C714S055000, C714S056000, C714S700000, C714S702000, C714S709000, C714S712000, C714S713000, C714S718000, C714S719000, C714S731000, C714S739000, C714S744000, C714S745000, C714S798000, C702S085000, C702S094000, C702S106000, C365S200000, C365S201000
Reexamination Certificate
active
08037375
ABSTRACT:
A method, device, and system are disclosed. In one embodiment method includes determining a left edge and right edge of a valid data eye for a memory. The method continues by periodically checking the left and right edges for movement during operation of the memory. If movement is detected, the method retrains the valid data eye with an updated left edge and right edge.
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“Qimonda GDDR5—White Paper”, Aug. 2007, 10 pgs.
Intel Corporation
Reynolds Derek J.
Trimmings John
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