Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reissue Patent
2006-02-23
2009-11-17
Chase, Shelly A (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reissue Patent
active
RE040991
ABSTRACT:
A CRC generation unit is equipped with multiple polynomial division circuits (PDC) to perform multiple different bit lengths polynomial divisions in parallel, including outputting of multiple remainder values, for an iteration of an iterative CRC generation for a data block. In one embodiment, the unit also includes a selector to select one of the remainder values, and a register to store the selected remainder value, return the stored remainder value to the PDCs for formation of different bit length dividends, and output the stored remainder value of the last iteration as the generated CRC value. In one embodiment, the unit further includes alignment circuitry to align the data block. In one embodiment, multiple units are provided to generate the CRC values of successive variable length data blocks. In one embodiment, the units form a shared resource to multiple network traffic flow processing units of a network traffic routing IC.
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Chase Shelly A
Schwabe Williamson & Wyatt P.C.
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