Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-04-26
2005-04-26
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06886140
ABSTRACT:
The present invention provides a method and apparatus which extracts flat data from a hierarchically related representation of a circuit, such as a netlist. The apparatus and method identifies unique cell elements by a cell instance identifier and determines flat data associated with those elements. When a previously encountered cell instance which has flat data stored describing that element is selected, higher level flat data which has been stored as the apparatus traverses the representation is appended to the stored flat data for the selected element. In this manner, an optimum flat data path to all elements, nets and components is created without a need for re-scanning previously encountered cell instances.
REFERENCES:
patent: 5528508 (1996-06-01), Russell et al.
patent: 5761664 (1998-06-01), Sayah et al.
patent: 5790416 (1998-08-01), Norton et al.
patent: 5805860 (1998-09-01), Parham
patent: 5875115 (1999-02-01), Weber
patent: 6026219 (2000-02-01), Miller et al.
patent: 6113647 (2000-09-01), Silve et al.
patent: 6263483 (2001-07-01), Dupenloup
patent: 6577992 (2003-06-01), Tcherniaev et al.
patent: 6578183 (2003-06-01), Cheong et al.
patent: 6591402 (2003-07-01), Chandra et al.
patent: 6668362 (2003-12-01), McIlwain et al.
patent: 6684376 (2004-01-01), Kerzman et al.
patent: 6735750 (2004-05-01), Korzyniowski et al.
patent: 20020087940 (2002-07-01), Greidinger et al.
patent: 20020112221 (2002-08-01), Ferreri et al.
patent: 20030005400 (2003-01-01), Karniewicz
patent: 20030018948 (2003-01-01), Chang et al.
patent: 20030079190 (2003-04-01), Parashkevov et al.
patent: 20030084416 (2003-05-01), Dai et al.
patent: 20040025129 (2004-02-01), Batchelor
patent: 20040078767 (2004-04-01), Burks et al.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Dimyan Magid Y.
Micro)n Technology, Inc.
Whitmore Stacy A.
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