Fast access multi-bit random access memory

Details Fast access multi-bit random access memory Fast access multi-bit random access memory

1995-08-08

1996-07-23

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

36518907, 365210, 341161, G11C 700

Patent

active

055396950

ABSTRACT:
A random access memory, having multi-bit memory cells, includes a successive approximation analog-to-digital (SAAD) converter and a comparator for reading data from the memory cells. In reading data from a cell, the SAAD generates a first reference voltage. This first reference voltage is compared, by the comparator, to the voltage stored in the cell to derive a first comparison result. Based on this first comparison result, a first bit of data is determined. Thereafter, the SAAD generates a second reference voltage based on the first reference voltage and the first comparison result. This second reference voltage is compared, by the comparator, to the voltage stored in the cell to derive a second comparison result. Based on this second comparison result, a second bit of data is determined. This process of: (1) generating a new reference voltage based on a previous reference voltage and a previous comparison result; (2) comparing the new reference voltage to the voltage stored in the memory cell to derive a new comparison result; and (3) deriving a new bit of data based on the new comparison result, is repeated until all of the data bits stored in the memory cell are determined. By reading data from a multi-bit memory cell in this manner, an n number of bits of data can be read in an n number of clock cycles.

REFERENCES:
patent: 4974207 (1990-11-01), Hashimoto
patent: 5184324 (1993-02-01), Ohta
patent: 5283761 (1994-02-01), Gillingham
patent: 5386388 (1995-01-01), Atwood et al.

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