Fast access charge coupled device memory organizations for a sem

Details Fast access charge coupled device memory organizations for a sem Fast access charge coupled device memory organizations for a sem

1978-02-27

1979-05-22

Hecker, Stuart N.

Static information storage and retrieval

Recirculation stores

Plural paths

365183, G11C 2100, G11C 1928

Patent

active

041562879

ABSTRACT:
This disclosure relates to fast access CCD memory organizations with parallel loops or tracks wherein the total number of data bits which can be stored on a single calculator chip is dependent on the overhead circuitry consisting of a number of refresh amplifiers and various switches required to switch the stored data from a storage track to a read/write location and also on the number of refresh amplifiers as well as control circuitry required for distribution of clock pulses to the respective storage tracks. As the number of switches and refresh amplifiers is increased, so is the total area required for storage bits. As the number of clock switches is increased, the power dissipation for the semiconductor chip is decreased. As the number of refresh amplifiers is increased, the access time and total service time is decreased. A number of different optimum memory organizations are disclosed.

REFERENCES:
patent: 3859640 (1975-01-01), Eberlein et al.
patent: 3889245 (1975-06-01), Gosney
patent: 4024512 (1977-05-01), Amelio et al.

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