Fair scheduling of ATM cell transmissions during overscheduled c

Multiplex communications – Data flow congestion prevention or control – Flow control of data transmission through a network

Patent

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Details

370395, 370468, H04L 1256

Patent

active

061153605

ABSTRACT:
A network hub and Asynchronous Transfer Mode (ATM) translator system (5) for use in a Local Area Network (LAN)-based communications system is disclosed. The network hub and ATM translator system (5) includes a host controller (10) that serves as the LAN hub, and which interfaces with a translator card (15) which includes a segmentation and reassembly device (12) in connection with SONET receive/transmit circuitry (20) that communicates with a transceiver (22) to transmit and receive ATM packet cells over a communications facility (FO). The translator card (15) also includes a scheduler (14) that includes a heap sort state machine (36) which maintains a sorted list of entries, in a heap fashion, in on-chip parameter memory (44) and off-chip parameter memory (18). The entries include, for each ATM channel, a channel identifier and a timestamp that indicates the time at which the next cell for the channel will be due for transmission. A due comparator (40) compares the timestamp of the root value in the heap (i.e., the channel with the next due cell) to a global time generated by a reference timer (38), and indicates to a source behavior processor (24) in the scheduler (14) that a cell is due for transmission. The scheduler than issues a transmit credit for the cell, and communicates this event with the SAR device (12) to effect the transmission as appropriate.

REFERENCES:
patent: 4757529 (1988-07-01), Glapa et al.
patent: 5313579 (1994-05-01), Chao
patent: 5812527 (1998-09-01), Kline et al.
patent: 5917822 (1999-06-01), Lyles et al.
patent: 5926459 (1999-07-01), Lyles et al.
patent: 6006270 (1999-12-01), Kobunaya

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