Fair data bus arbitration system which assigns adjustable priori

Details Fair data bus arbitration system which assigns adjustable priori Fair data bus arbitration system which assigns adjustable priori

1997-11-26

2000-07-18

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710107, 710113, 710 40, 710 36, 710 42, 710116, 710123, 710240, 710241, 710242, 710244, 711150, G06F 1300

Patent

active

060921374

ABSTRACT:
A scheme for arbitrating access to a data bus shared among a plurality of competing sources is provided. Each competing source is assigned an adjustable priority weighting value (PWV) which is initially set to an initial value based on the bandwidth requirements of the competing source. During arbitration, the PWVs of those competing sources requesting access to the bus are compared, and the competing source with the smallest PWV is granted access. The PWV of the competing source which was granted access to the bus is reset to its initial value and the PWV of each competing source which requested, but was denied, access is reduced by one for subsequent comparisons. The arbitration scheme of the present invention is further applied to two-level arbitration. Each competing source is classified into a competing source group, and the requests from the grouped competing sources are processed by first level arbitration. First level arbitration passes one competing source for each group to a second level arbiter. The second level arbiter compares the PWVs of the competing sources resulting from first level arbitration to determine the competing source with the smallest PWV, and adjusts the PWVs after access to the bus has been granted.

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