Failure counting method and device

Details Failure counting method and device Failure counting method and device

1997-11-14

1999-11-09

Tu, Trinh L.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error count or rate

G06F 1100

Patent

active

059833726

ABSTRACT:
After producing a failure bit matrix made up of a square matrix of an arbitrary degree in which failure analysis results of memory cells are written as elements at positions specified by row addresses and column addresses, the produced failure bit matrix is multiplied by its degree, the values of the origin of the matrix obtained by subjecting the degree-multiplied failure bit matrix to discrete cosine transformation are calculated, and the result is outputted as the number of failures.

REFERENCES:
patent: 4958346 (1990-09-01), Fujisaki
patent: 5841783 (1998-11-01), Suzuki et al.

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