Fail-safe method and circuit

Details Fail-safe method and circuit Fail-safe method and circuit

2007-09-04

2007-09-04

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Reliability

Fail-safe

C326S009000, C326S112000, C326S121000, C326S122000

Reexamination Certificate

active

10531398

ABSTRACT:
A method and a circuit for producing a fail-safe output signal in case of an open circuit condition of an input pad of a digital circuit unit, comprising a first inverter stage providing a constant switch level; a second inverter stage providing a variable switch level that depends of the signal level of the input pad and comparing the constant switch level of the first inverter stage with the variable switch level of the second stage and providing an output signal at an output terminal thereof if the variable switch level of the second stage is greater than the constant switch level; and an additional circuit clement connected in series with the second inverter for decreasing the switch level of the second inverter stage.

REFERENCES:
patent: 4709172 (1987-11-01), Williams
patent: 4918336 (1990-04-01), Graham et al.
patent: 6288577 (2001-09-01), Wong
patent: 6320406 (2001-11-01), Morgan et al.
Knight Jr, Thomas F, “A Self-Terminating Low-Voltage Swing CMOS Output Driver”, Apr. 1988 IEEE Journal Solid State CIrcuits, vol. 23, No. 2 pp. 457-464.

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