Fail-safe "AND" gate using capacitor discharge through a transfo

Details Fail-safe "AND" gate using capacitor discharge through a transfo Fail-safe "AND" gate using capacitor discharge through a transfo

1984-10-24

1987-01-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307200A, 307246, 307318, 307443, 307446, H03K 19007

Patent

active

046366601

ABSTRACT:
The invention involves an "AND" logic circuit with built-in safety comprising a first and a second input to which pulses can be applied, and respectively tied to the base of a first and a second transistor (1,2) each having a collector to which a reference voltage (5) is applied by means of a corresponding resistance (6,7), and comprising, in addition, a third transistor (3) having its base tied to ground by means of the secondary winding (15) of a transformer whose transforming ratio is less than unity, its collector tied to the positive terminal of the d.c. voltage supply by means of a resistance (13), and its emitter having the reference voltage (5) applied thereto. According to the invention, the first transistor (1) has its emitter tied by means of a first diode (8) and its collector tied by means of a capacitor (9) to ground, whereas the second transistor (2) has its emitter directly tied and its collector tied by means of a branch comprising a capacitor (10) and a second diode (11) in series to ground. The anode of the first diode (8) and the cathode of the second diode (11) are tied to ground.

REFERENCES:
patent: 3254232 (1966-05-01), Candy
patent: 3600604 (1971-08-01), Thorne-Booth
patent: 3684926 (1972-08-01), Kosko
patent: 3909632 (1975-09-01), Sibley
patent: 4065683 (1977-12-01), Clarke
patent: 4125784 (1978-11-01), Harrison

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