Fail-over of multiple memory blocks in multiple memory...

Details Fail-over of multiple memory blocks in multiple memory... Fail-over of multiple memory blocks in multiple memory...

2006-05-30

2006-05-30

Le, Dieu-Minh (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S006130

Reexamination Certificate

active

07055054

ABSTRACT:
A computer system has a memory controller for controlling accesses to multiple memory modules, each having multiple memory blocks, and a fail-over circuit for failing-over individual memory blocks from multiple memory modules. The digital information stored in an individual memory block that has experienced memory errors in excess of a permissible threshold is copied to an auxiliary memory location. The memory accesses directed to the failed-over memory block are intercepted and redirected to the auxiliary memory location. Tags are stored to identify failed-over memory modules and corresponding auxiliary memory modules, so a tag look-up for an accessed memory address can generate a hit signal when the memory access is to a failed-over memory module and cause the auxiliary memory module to respond to the memory access.

REFERENCES:
patent: 5208813 (1993-05-01), Stallmo
patent: 5526482 (1996-06-01), Stallmo et al.
patent: 5588110 (1996-12-01), DeKoning et al.
patent: 5617425 (1997-04-01), Anderson
patent: 5724501 (1998-03-01), Dewey et al.
patent: 5740357 (1998-04-01), Gardiner et al.
patent: 5905858 (1999-05-01), Jeddeloh
patent: 6023748 (2000-02-01), Peters et al.
patent: 6038680 (2000-03-01), Olarig
patent: 6052798 (2000-04-01), Jeddeloh
patent: 6073218 (2000-06-01), DeKoning et al.
patent: 6098132 (2000-08-01), Olarig et al.
patent: 6577532 (2003-06-01), Chevallier
Embedded Memory: The All-Purpose Core, by Brian Dipert, Technical Editor, pp. 34-50 (Mar. 13, 1998).
Ferro RAMs Headed for Volume Debut, Electronic Engineering Times, by Craig Matsumoto and Yoshika Hara, pp. 1 and 108 (Mar. 9, 1998).

Affiliated with

Also associated with

Rating

Fail-over of multiple memory blocks in multiple memory... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fail-over of multiple memory blocks in multiple memory..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fail-over of multiple memory blocks in multiple memory... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3580183