Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-27
2008-08-19
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07415684
ABSTRACT:
One embodiment of the present invention provides a method and a system that facilitates structural coverage of a design during a design verification process. During operation, the system receives a hardware description of the design, which contains one or more module instances and a set of structural coverage targets for a set of structures in the design. The system then extracts a control flow, the set of structural coverage targets, and a set of structural coverage metrics for the hardware description, and creates a shadow module with the same control flow as the hardware description. This shadow module contains a set of parallel structures that correspond to the set of structural coverage targets in the control flow of the hardware description and serve as targets for formal methods used to analyze the design. The system also generates a set of cross-module references to link the set of parallel structures in the shadow module with signals from the set of structures in the hardware description. The system then applies a formal verification tool to the design, including the shadow module and the cross-module references in an attempt to achieve the desired structural coverage.
REFERENCES:
patent: 6779135 (2004-08-01), Ur et al.
patent: 7124383 (2006-10-01), Chen et al.
patent: 2003/0110474 (2003-06-01), Ur et al.
patent: 2006/0010428 (2006-01-01), Rushby et al.
Harer Kevin M.
Munishwar Mandar
Park Vaughan & Fleming LLP
Siek Vuthe
Synopsys Inc.
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