Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-09-25
2007-09-25
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
11160631
ABSTRACT:
A design management tool which automates the parallel validation of an entire integrated circuit while the individual blocks (together forming the integrated circuit) are designed. In an embodiment, a designer specifies various checkpoints associated with each design stage, and the specific information to be made available to a top level performing the validation. When each checkpoint is reached for a design block, the specified information is made available to the top level and the validation of the integrated circuit is performed up to that checkpoint. As a result, design closure of the integrated circuit can be obtained quickly.
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J.Y.Sayah, R.Gupta, D.D.Sherlekar, P.S. Honsinger, J.M.Apte, S.W.Bollinger, H.H.Chen; S.Dasgupta, E.P.Hsieh, A.D.Huber, E.J.Hughes, Z.M.Kurzum, V.B.Rao, T.Tabtieng, V. Valijan and D.Y.Yang, “Design Planning for high-performance ASICs”, IBM Journal of Research and Development, 1996, pp. 1-23, vol. 40, No. 4, IBM Corporation.
Arora Sharad
Ramaiyan Sivakumar
Visvanathan Venkatasubramanyam
Brady W. James
Do Thuan
Stewart Alan K.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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