Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Patent
1996-09-27
1999-01-12
Niebling, John
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
438689, 438758, 438908, H01L 2100
Patent
active
058588639
ABSTRACT:
Disclosed is a fabricating system including a plurality of processing apparatuses connected to each other by means of an inter-apparatus transporter, wherein one group of semiconductor wafers are processed in processing apparatuses and other group of wafers are transported to specified processing apparatuses for a time interval from (To+T) to a time To; and another group of wafers are processed and the remaining group of wafers are transported for a time interval from (To+T) to (To+2T). Since processing apparatuses can receive at least one of works from the inter-apparatus transporter for a time interval T min, the distribution of works from the transporter to processing apparatuses is completed for the time interval T min. The transporter is emptied for each time interval T min, and works are unloaded to the emptied transporter, which makes easy the scheduling, control and management of the transporting of a plurality of works in the fabricating system. Moreover, since the fabricating system including processing apparatuses is periodically controlled at a cycle time T min, the scheduling of a plurality of works can be made easy, to enhance the level of optimization, thus improving the productivity.
REFERENCES:
patent: 4592306 (1986-06-01), Galleco
patent: 4886592 (1989-12-01), Anderle
patent: 5019233 (1991-05-01), Blake
patent: 5024570 (1991-06-01), Kiriseko
patent: 5067218 (1991-11-01), Williams
patent: 5076205 (1991-12-01), Vowles
patent: 5135608 (1992-08-01), Okutani
patent: 5202716 (1993-04-01), Tateyama
patent: 5259881 (1993-11-01), Edwards
patent: 5388945 (1995-02-01), Garric
patent: 5399531 (1995-03-01), Wu
patent: 5404894 (1995-04-01), Shiraiwa
patent: 5443346 (1995-08-01), Murata
patent: 5445491 (1995-08-01), Nakagawa
patent: 5601686 (1997-02-01), Kawamura et al.
"Operation of LSI Production System to Reduce Development Investment and to Meet Diversified Needs," Nikkei Microdevice, Aug. 1992, pp. 66-74.
Wolf and Tauber, Silicon Processing for the VLSI Era, vol. 1, 1986, p. 429.
Mamoru Shibada, Cassette Transfer System "Auto Track", Electrical Material, Mar. 1984, (pp., 4, 14-15, 17).
Kawamoto Yoshifumi
Kawamura Yoshio
Mizuishi Kenichi
Murakami Eiichi
Uchida Fumihiko
Hitachi , Ltd.
Mulpuri S.
Niebling John
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