Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Patent
1996-08-07
1998-02-10
Dang, Trung
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
438784, 438787, 438790, 438795, H01L 2131
Patent
active
057168911
ABSTRACT:
With forming an element isolation oxide layer on p-well in a thickness of 3500 .ANG., n-type MOS transistor with a gate electrode and source and drain regions are fabricated. Thereafter, an oxide layer is deposited by an atmospheric pressure chemical vapor deposition. Subsequently, with taking TEOS as material, a TEOS-BPSG layer is deposited by way of a reduced pressure chemical vapor deposition. Then, under inert atmosphere, heat treatment is performed at a temperature higher than or equal to 700.degree. C. to remove organic component in the layer. Thereafter, reflow process is performed at a temperature of approximately 900.degree. C. under nitrogen atmosphere at normal pressure. By this, the organic component in the BPSG layer formed utilizing TEOS can be removed out of the layer to improve element isolation characteristics and reduce leak current.
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Dang Trung
NEC Corporation
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