Fabrication process of memory cell

Details Fabrication process of memory cell Fabrication process of memory cell

2007-12-24

2008-11-04

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C257S066000

Reexamination Certificate

active

07445972

ABSTRACT:
A memory cell suitable for being disposed over a substrate is provided. The memory cell includes a poly-silicon island, a first dielectric layer, a trapping layer, a second dielectric layer and a control gate. The poly-silicon island is disposed on the substrate and includes a source region, a drain region and a channel region located between the source and drain regions. The channel region has a plurality of regularly arranged tips thereon. The first dielectric layer is disposed on the poly-silicon island. The trapping layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the trapping layer. The control gate is disposed on the second dielectric layer. The memory cell mentioned above can be integrated into the LTPS-LCD panel or OLED panel.

REFERENCES:
patent: 6991974 (2006-01-01), Tsao

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