Fabrication process of bonded total dielectric isolation substra

Details Fabrication process of bonded total dielectric isolation substra Fabrication process of bonded total dielectric isolation substra

1995-03-23

1998-06-30

Fourson, George R.

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

438459, H01L 2176

Patent

active

057733520

ABSTRACT:
After forming a groove on one surface of a single-crystalline silicon layer, a silicon oxide layer is formed. Also, a polycrystalline silicon layer is formed on the silicon oxide layer to cover the groove. Subsequently, by a buffer layer of polycrystalline silicon is deposited over the polycrystalline silicon layer to form a smooth surface. Thereafter, a silicon oxide layer is formed on a separately prepared supporting substrate. After laminating both substrates by mating the buffer layer and the silicon oxide layer, annealing is performed. By this, voids which might otherwise be generated at the junction interface in the dielectric isolation substrate can be eliminated.

REFERENCES:
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patent: 5308776 (1994-05-01), Gotou
patent: 5420064 (1995-05-01), Okonogi et al.
Easter W., G., et al, "Polysilcon to Silicon Bonding in Dieletrically Isolated Wafers", Extended Abstracts vol. 91-2 The Electrochemical Society Oct. 1991 pp. 707-708.
Horiuchi, M, et al, "A Mechanism of Silicon Wafer Bonding", Extended Abstracts vol. 91-2 The Electrochemical Society Oct. 1991, pp. 667-668.
Mitani, K, "Wafer Bonding Technology . . . A Review", pp. 669-675, 1992 Proceedings of the 1st Int'l Symposium on Semic. Wafer Bonding.

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