Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-03-17
2001-08-14
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S656000
Reexamination Certificate
active
06274484
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to a method used to form low resistivity tungsten layers, featuring good adhesion to underlying dielectric layers.
(2) Description of Prior Art
The mid-band gap of tungsten, as well as the attractive work function of tungsten—silicon, make tungsten an attractive option as a gate material for metal oxide semiconductor field effect transistor, (MOSFET), devices. In addition the low resistivity, as well as the high electromigration resistance of tungsten, also makes this metal an attractive candidate for metal interconnect structures. Tungsten layers can be obtained using either chemical vapor deposition, (CVD), or plasma vapor deposition, (PVD), procedures, however both deposition modes can present difficulties For example the desired low resistivity of CVD tungsten layers, deposited at temperatures greater than 400° C., using tungsten hexafluoride as a source, is in fact realized, however the adhesion of CVD tungsten to underlying dielectric layers can be marginal. Therefore the use of CVD tungsten, as a gate material, overlying a silicon dioxide layer, or the use of CVD tungsten as a damascene structure, formed in openings in silicon oxide layers, can present adhesion limitations. Tungsten layers obtained via PVD procedures, although resulting in improved adhesion to underlying insulator layers, when compared to CVD counterparts, can damage an underlying gate insulator layer, increasing the risk of alpha particle generation, therefore precluding PVD procedures as a method of forming tungsten gate structures. In addition the poor step coverage of PVD layers, restrict its use as a damascene metal layer.
This invention will describe a process for obtaining tungsten layers, featuring the desired characteristics such as low resistivity, good adhesion to underlying insulator layers, as well as an absence of alpha particle generation. A process of depositing a metastable tungsten nitride layer via a deposition procedure that results in good step coverage, in good adhesion, and with an absence of alpha particle generation to underlying insulator layers, is first performed. A subsequent anneal procedure then converts the high resistivity, metastable tungsten nitride layer, to a low resistivity tungsten layer, still retaining the desired adhesion to underlying silicon oxide layers. Prior art such as Lu et al, in U.S. Pat. No. 5,913,145, as well as Balasubramanyuam et al, in U.S. Pat. No. 5,923,999, describe methods of forming tungsten nitride layers for use as a barrier layer, as well as for use as a gate material, however these prior arts do not teach the present invention in which the optimum properties of tungsten are obtained via formation of a metastable tungsten nitride layer, converted to the desired tungsten layer.
SUMMARY OF THE INVENTION
It is an object of this invention to form a tungsten layer, to be used for a MOSFET gate structure, and to be used for a damascene metal structure, with the tungsten layer featuring: good adhesion to underlying insulator layers; good conformality or step coverage; low resistivity; and without generating alpha particles in surrounding insulator layers, during the tungsten deposition procedure.
It is another object of this invention to deposit a metastable tungsten nitride layer, via an plasma enhanced chemical vapor deposition, (PECVD), or via a metal organic chemical vapor deposition, (MOCVD), procedure, to obtain the desired adhesion and step coverage for a subsequent tungsten layer.
It is yet another object of this invention to anneal the metastable tungsten nitride layer to form a lower resistivity tungsten layer.
In accordance with the present invention a method of forming a low resistivity, tungsten layer, featuring a deposition and annealing sequence that results in the desired tungsten adhesion and step coverage, with an absence of alpha particle generation to underlying layers, is described. A tungsten nitride layer is first deposited via PECVD, or MOCVD procedures, resulting in excellent adhesion to underlying insulator layers, such as a silicon dioxide layer, for a MOSFET application, or other insulator layers for a metal damascene structure application. A rapid thermal anneal, (RTA), procedure is then used to convert the high resistivity tungsten nitride layer to a lower resistivity tungsten layer, still maintaining the excellent adhesion to the underlying silicon oxide layers. Patterning of the tungsten layer is then used to form a tungsten gate structure, for the MOSFET application, or a reactive ion etch, (RIE), or chemical mechanical polishing, (CMP), procedure, to form the tungsten damascene structure, for a metal interconnect application.
REFERENCES:
patent: 5907188 (1999-05-01), Nakajima et al.
patent: 5913145 (1999-06-01), Lu et al.
patent: 5923999 (1999-07-01), Balasubramanyam et al.
patent: 5939788 (1999-08-01), McTeer
patent: 6103609 (2000-08-01), Lee et al.
patent: 908934 (1999-04-01), None
patent: WO 98/23389 (1998-06-01), None
Cheu Sheng-Hsiung
Tsai Ming-Hsing
Ackerman Stephen B.
Dang Trung
O'Saile George
Taiwan Semiconductor Manufacturing Company
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