Metal treatment – Compositions – Heat treating
Patent
1982-05-18
1984-03-20
Roy, Upendra
Metal treatment
Compositions
Heat treating
29576B, 148187, 357 34, 357 91, H01L 21425, H01L 21265, H01L 21225
Patent
active
044378971
ABSTRACT:
A method for fabricating a high performance bipolar device having a shallow emitter and a narrow intrinsic base region is described. The method uses a minimum number of process steps. The method involves providing a silicon semiconductor body having regions of monocrystalline silicon isolated from one another by isolation regions and a buried subcollector therein. A layer of polycrystalline silicon is deposited on the silicon substrate. The surface of the polycrystalline silicon is oxidized and the polycrystalline silicon is implanted with a base impurity. Silicon nitride and oxide layers are deposited on the polysilicon layer. An opening is made in the surface oxide layers and the silicon nitride layer to define the emitter area. The polycrystalline silicon is thermally oxidized to drive the base impurity into the substrate. The thermal oxide is removed in an isotropic etch to form a sidewall. The emitter impurity is ion implanted into the polycrystalline silicon in the emitter area and then driven into the substrate. The collector, base and emitter contact openings are made and the conductive metallurgy is formed.
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IBM Technical Disclosure Bulletin, vol. 23, No. 9, Feb. 1981, "Shallow Emitter Process for Bipolar Transistors".
International Business Machines - Corporation
Kieninger Joseph E.
Roy Upendra
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