Fabrication process for a novel multi-storage EEPROM cell

Details Fabrication process for a novel multi-storage EEPROM cell Fabrication process for a novel multi-storage EEPROM cell

1999-04-23

2000-01-25

Crane, Sara

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257314, 257315, 257317, 257319, 257320, H01L 29788

Patent

active

060181788

ABSTRACT:
A EEPROM cell design, and a method of fabrication for the EEPROM cell, has been developed. The EEPROM cell includes a polysilicon control gate structure, polysilicon select gate structures, and novel polysilicon, floating gate spacer structures, fabricated using deposition and anisotropic etching, sidewall processes. The use of floating gate spacers, allows density improvements to be realized. The EEPROM cell can programmed, read, and erased, using only biasing conditions, without having to use UV light for the erase cycle.

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patent: 5529945 (1996-06-01), Rao
patent: 5614747 (1997-03-01), Ahn et al.
patent: 5929480 (1999-07-01), Hisamune

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