Fabrication of semiconductor integrated circuit chips

Details Fabrication of semiconductor integrated circuit chips Fabrication of semiconductor integrated circuit chips

2007-09-11

2007-09-11

Toledo, Fernando L. (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

C257S238000, C438S401000

Reexamination Certificate

active

10905534

ABSTRACT:
A semiconductor wafer includes a plurality of active circuit die areas, each of which being bordered by a dicing line region through which the plurality of active circuit die areas are separated from each other by mechanical wafer dicing. Each of the plurality of active circuit die areas has four sides. An overcoat covers both the active circuit die areas and the dicing line region. An inter-layer dielectric layer is disposed underneath the overcoat. A reinforcement structure includes a plurality of holes formed within the dicing line region. The plurality of holes are formed by etching through the overcoat into the inter-layer dielectric layer and are disposed along the four sides of each active circuit die area. A die seal ring is disposed in between the active circuit chip area and the reinforcement structure.

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