Fabrication of defect free silicon on an insulating substrate

Details Fabrication of defect free silicon on an insulating substrate Fabrication of defect free silicon on an insulating substrate

1994-04-04

1996-07-30

Hearn, Brian E.

Metal treatment

Barrier layer stock material, p-n type

With recess, void, dislocation, grain boundaries or channel...

437 62, 437 61, 437974, 148DIG12, 148DIG135, H01L 2930

Patent

active

055407854

ABSTRACT:
A method for fabricating silicon on insulator structures having a dislocation free silicon layer. The method utilizes low temperature UHVCVD to deposit a very heavily doped etch stop layer having a very steep doping profile onto a substrate and a lightly doped active layer onto the etch stop layer. An insulator is formed on the active layer and a carrier wafer is formed on the insulator layer. The original substrate is removed in a first etch and the etch stop layer is removed in a second etch resulting in a thin, uniform active layer. In one embodiment, a small percentage of germanium is added to the etch stop layer to produce a defect free epitaxial active layer.

REFERENCES:
patent: 3293087 (1966-12-01), Porter
patent: 3455748 (1969-07-01), Lindmayer et al.
patent: 3829889 (1974-08-01), Allison et al.
patent: 3969749 (1976-07-01), Bean
patent: 4000020 (1976-12-01), Gartman
patent: 4351856 (1982-09-01), Matsui et al.
patent: 4534804 (1985-08-01), Cade
patent: 4601779 (1986-07-01), Abernathey et al.
patent: 4771016 (1988-09-01), Bajor et al.
patent: 4861393 (1989-08-01), Bean et al.
patent: 4962051 (1990-10-01), Lian
patent: 4979015 (1990-12-01), Stierman et al.
patent: 5013681 (1991-05-01), Godbey et al.
patent: 5147808 (1992-09-01), Pronko
patent: 5261999 (1993-11-01), Pinker et al.
Hertzog, et al. "X-ray Investigation of Boron- and Germanium-Doped Silicon Epitaxial Layers," J. Electrochem. Soc.: Solid State Science and Technology, Dec. 1984, pp. 2969-2974.
Hirayama, et al. (1988) "Stress reduction and doping efficiency and B- and Ge-doped silicon molecular beam epitaxy films," Appl. Phys. Lett. 52(16):1335-1337.
Lasky, et al. (1985) "Silicon-On-Insulator (SOI) By Bonding and Etch-Back," IEDM Technical Digest, 685.
Maszara, et al. (1988) "Bonding on silicon wafers for silicon-on-insulator," J. Appl. Phys. 64(10):4943-4946.
Meyerson, et al. (1987) "Nonequilibrium Boron Doping Effects in Low-Temperature Epitaxial Silicon Films," Appl. Phys. Lett., 50(2):113.
Palik, et al. (1985) "Ellipsometric Study of the Etch-Stop Mechanism in Heavily Doped Silicon," J. Electrochem., Soc. 132:135-141.
Sze, (1988) VLSI Technology, 2d ed., pp. 85-89.
Kimura et al., "Epitaxial Film Transfer Technique for Producing Single Crystal Si Film on an Insulating Substrate", Appl. Phys. Lett. 43(3); Aug. 1983; pp. 263-265.
Wolf; "Silicon Processing for the VLSI Era", vol. 1, Process Technology, Lattice Press, 1986, pp. 36-51.
Mastara et al. "Bonding of Silicon Wafers for Silicon-On-Insulator", J. Appl Phys. 64(10); Nov. 1988, pp. 4943-4950.

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