Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-08-09
2005-08-09
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S633000, C438S637000, C438S643000, C438S645000, C438S675000, C438S687000, C438S692000, C438S695000, C438S697000, C438S700000, C438S760000, C438S959000
Reexamination Certificate
active
06927160
ABSTRACT:
A copper-containing layer suitable for an electrical interconnect in a device such as an integrated circuit is created by a procedure in which a trench (104) is formed through a dielectric layer (102) down to a substrate (100). A diffusion barrier (106) is provided over the dielectric layer and into the trench. Copper (108) is deposited over the diffusion barrier and into the trench. Chemical mechanical polishing is utilized to remove the copper outside the trench down substantially to the diffusion-barrier material overlying the dielectric layer. A sputter etch, typically of the reactive type, is then performed to substantially remove the diffusion-barrier material overlying the dielectric layer. The sputter etch typically removes copper above and/or in the trench at approximately the same rate as the diffusion-barrier material so as to substantially avoid the undesirable dishing phenomenon.
REFERENCES:
patent: 3911579 (1975-10-01), Lane et al.
patent: 4521286 (1985-06-01), Horwitz
patent: 4643629 (1987-02-01), Takahashi et al.
patent: 4675096 (1987-06-01), Tateishi et al.
patent: 4818359 (1989-04-01), Jones et al.
patent: 5089442 (1992-02-01), Olmer
patent: 5102821 (1992-04-01), Mosiehi
patent: 5240556 (1993-08-01), Ishikawa et al.
patent: 5455194 (1995-10-01), Vasquez et al.
patent: 5712759 (1998-01-01), Saenger et al.
patent: 5770517 (1998-06-01), Gardner et al.
patent: 5877078 (1999-03-01), Yanagida
patent: 5905298 (1999-05-01), Watatani
patent: 5933756 (1999-08-01), Fuse
patent: 5969422 (1999-10-01), Ting et al.
patent: 5985762 (1999-11-01), Geffken et al.
patent: 5994206 (1999-11-01), Gupta et al.
patent: 6034434 (2000-03-01), Bothra et al.
patent: 6103581 (2000-08-01), Lin et al.
patent: 6106634 (2000-08-01), Ghanayem et al.
patent: 6110232 (2000-08-01), Chen et al.
patent: 6143662 (2000-11-01), Rhoades et al.
patent: 6218303 (2001-04-01), Lin
patent: 6265313 (2001-07-01), Huang et al.
patent: 6271121 (2001-08-01), Webb
patent: 6281535 (2001-08-01), Ma et al.
patent: 6287968 (2001-09-01), Yu et al.
patent: 6287977 (2001-09-01), Hashim et al.
patent: 6440844 (2002-08-01), Takagi et al.
patent: 6475903 (2002-11-01), Gardner
“SiLK, Product Literature”, The Dow Chemical Co., 1995-2004, 2 p.
“SiLK, SiLK Works”, The Dow Chemical Co., 1995-2004, 1 p.
Fourson George
García Joannie Adelle
Meetin Ronald J.
National Semiconductor Corporation
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