Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1992-12-07
1993-12-21
Hille, Rolf
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257369, 257413, 257900, H01L 2968, H01L 2978, H01L 2992
Patent
active
052723674
ABSTRACT:
A process for fabricating n-channel and p-channel metal-oxide-semiconductor devices in the manufacture of very large scale integrated circuits, such as high density dynamic random access memories (DRAMs). n-channel and p-channel gate layers of selected conductive and non-conductive materials are initially formed on the surface of a semiconductor substrate, and the n-channel gate layers in a memory array and periphery section of the substrate are initially photodefined, leaving the p-channel gate layers in place over an area of the substrate where future p-channel transistors and P+ active area will be formed. A series of ion implantation steps are then carried out to form the n-channel transistors, therefor using no masking steps, since the in-place gate layers on the p-channel peripheral section serves as an ion implantation mask over this section and thus prevents n-type ions from entering the p-type transistor areas of the peripheral section. Then, the completed n-channel transistors memory section is appropriately masked prior to photo-defining the transistor gate electrodes for either p or n-type transistors in the peripheral section of the substrate. Using this process, not only are the total number of necessary ion implantation masking steps held to an absolute minimum, but the p-channel peripheral section circuits such as sense amplifiers, decoders and drivers, logic circuits, and the like are exposed to a minimum of temperature cycling, thereby enhancing device reliability and improving the high frequency performance of the devices thus produced.
REFERENCES:
patent: 4345366 (1982-08-01), Brower
patent: 4970564 (1990-11-01), Kimura et al.
patent: 5025301 (1991-06-01), Shimizu
patent: 5032530 (1991-07-01), Lowrey et al.
Dennison Charles H.
Lowrey Tyler A.
Hille Rolf
Limanek Robert
Micro)n Technology, Inc.
Protigal Stanley N.
LandOfFree
Fabrication of complementary n-channel and p-channel circuits (I does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fabrication of complementary n-channel and p-channel circuits (I, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabrication of complementary n-channel and p-channel circuits (I will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-310884