Fabrication of buried channel devices with shallow junction dept

Details Fabrication of buried channel devices with shallow junction dept Fabrication of buried channel devices with shallow junction dept

1996-11-18

1999-01-26

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257404, H01L 2976, H01L 2994

Patent

active

058641637

ABSTRACT:
The channel doping profile of a PMOS field effect transistor consists of a shallow distribution of a P-type dopant as a threshold adjust implant, a deeper distribution of an N-type dopant as an buried channel stop implant and a still deeper implantation of an N-type dopant as an antipunchthrough implant. A junction is formed between the P-type threshold adjust implant and the N-type buried channel stop implant at a relatively shallow depth so that the depth of the buried channel region is limited by the buried channel stop implant, reducing the short channel effect. The channel doping profile is formed so that diffusion of impurities from the channel region to the gate oxide is prevented. The buried channel stop implant is made first through a sacrificial oxide layer. The sacrificial oxide is etched and a gate oxide layer and a thin film of polysilicon are deposited on the surface of the gate oxide. Both the threshold implant and the antipunchthrough implant are made through the thin polysilicon layer and the gate oxide layer. After the channel doping profile is defined, additional gate material is deposited and device construction is completed in the normal manner.

REFERENCES:
patent: 5675172 (1997-10-01), Miyamoto et al.
patent: 5698884 (1997-12-01), Bennen
patent: 5719422 (1998-02-01), Burr et al.
patent: 5780907 (1998-07-01), Ema et al.

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