Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – In combination with or also constituting light responsive...
Reexamination Certificate
2002-12-30
2004-01-13
Clark, Jasmine (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
In combination with or also constituting light responsive...
C257S052000, C257S057000, C257S059000, C257S124000
Reexamination Certificate
active
06677616
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a photosensitive cell array for detection of non-visible light ray such as an X-ray, etc., and more particularly, to a method of fabricating a thin film transistor substrate for an X-ray detector that reduces the number of steps in an etching process using masks.
2. Discussion of the Related Art
Generally, imaging systems for photographing an object using non-visible light, such as an X-ray, etc., have been used for medical, scientific and industrial applications. These X-ray imaging systems typically convert the X-ray into an electrical signal and include an X-ray detecting panel for detecting an X-ray passing through an object.
As shown in
FIG. 1
, a conventional X-ray detecting panel includes a photosensitive layer
6
for detecting an X-ray and a thin film transistor substrate
4
for switching and outputting the detected X-ray from the photosensitive layer. The thin film transistor substrate
4
includes pixel electrodes
5
arranged in a pixel unit, and thin film transistors (TFTs), each of which is connected to a charging capacitor Cst, a gate line
3
and a data line (not shown). A dielectric layer
7
and an upper electrode
8
are provided on the upper portion of the photosensitive layer
6
. The upper electrode
8
is connected to a high voltage generator
9
. The photosensitive layer
6
is made of selenium with a thickness of hundreds of &mgr;m. The photosensitive layer
6
detects an incident X-ray and converts it into an electrical signal. In other words, the photosensitive layer
6
produces an electron-hole pair when an X-ray is incident thereto and separates the electron-hole pair when a high voltage of several kV is applied to the upper electrode
8
by the high voltage generator
9
. The pixel electrode
5
charges the charging capacitor Cst with holes produced by detection of an X-ray by the photosensitive layer
6
. The thin film transistor produces a gate signal inputted over the gate line
3
to apply a voltage stored in the charging capacitor Cst to the data line. Pixel signals supplied to the data line are applied, via a data reproducer, to a display device.
FIG. 2
is a plan view showing a conventional structure of a thin film transistor substrate. In the thin film transistor substrate of
FIG. 2
, the pixel electrode
5
is formed at a unit pixel area defined by the gate line
3
and the data line
10
. The charging capacitor Cst is formed by the pixel electrode
5
having a storage insulation layer (not shown) and a transparent electrode (not shown) at a lower portion of the pixel electrode
5
. A ground electrode
22
is formed across the pixel electrode
5
to reset the residual electric charges of the charging capacitor Cst. The TFT is formed at an intersection between the data line
10
and the gate line
3
and consists of a gate electrode
12
extended from the gate line
3
, a drain electrode
16
extended from the data line
10
, a source electrode
14
connected to the pixel electrode
5
via a contact hole
15
, and a semiconductor layer (not shown) connected to the source electrode
14
and the drain electrode
16
. One end of the gate line
3
is provided with a gate pad
18
. One end of the data line
10
is provided with a data pad
20
. The gate pad
18
and the data pad
20
connect the gate line
3
and the data line
10
to a driver integrated circuit (IC), respectively. The gate line
3
, the gate electrode
12
and the gate pad
18
are made of the same metal material and preferably have a structure in which aluminum (Al) and molybdenum (Mo) are sequentially disposed. The data line
10
is made from Mo to reduce its resistance value to produce good signal transfer characteristics. Like the gate pad
18
, the data pad
20
has a structure with sequentially-disposed Al and Mo to connect to the driver IC using the aluminum wiring bonding. The data pad
20
is formed in a different layer from the data line
10
. Therefore, the data pad
20
and the data line
10
are connected via a contact hole
19
formed through a gate insulating film. The gate pad
18
and the data pad
20
have aluminum layers which are exposed to be connected to the driver IC through the contact holes
17
and
21
, respectively.
A method of fabricating the thin film transistor substrate having the structure as mentioned above is described with reference to
FIG. 2
to FIG.
6
. First, a metal film is formed on the glass substrate
2
using vapor deposition. Using a first mask pattern, gate line
3
, a gate electrode
12
, gate pad
18
and data pad
20
are formed simultaneously. In this case, the gate electrode
12
, the gate line
3
, the gate pad
18
and the data pad
20
have sequentially disposed aluminum (Al)
42
and molybdenum Mo
44
structure. Using continuous vapor disposition, a gate insulating film
32
, an amorphous silicon layer and an amorphous silicon layer doped with an impurity, hereinafter referred to as “n
+
layer”, are sequentially formed on the entire surface of the glass substrate
2
having the gate line
3
and the gate electrode
12
, etc. Next, the n
+
layer and the amorphous silicon layer is patterned using a second mask pattern to provide a semiconductor layer
34
forming a channel of the thin film transistor. After the semiconductor layer
34
is formed, the gate insulating film
32
on the data pad
20
is patterned using a third mask pattern so as to form an exposed region as a contact hole
19
to allow contact between the data pad
20
and the data line
10
to be formed later. In addition, the gate insulating film
32
on the gate line
3
is patterned by the same photolithography process using the third mask pattern, thus forming a contact hole (not shown) to allow contact between the gate line
3
and the data line
10
in a static electricity preventing circuit. After contact hole
19
is formed, a metal film of Mo material is formed and then patterned using a fourth mask pattern, thereby providing the data line
10
, the source electrode
14
, the drain electrode
16
, and the ground electrode
22
. In this case, the data line
10
is connected via the contact hole
19
to the data pad
20
, as shown in FIG.
6
. Likewise, in the static electricity preventing circuit, the data line
10
is connected, via the contact hole defined at the gate insulating film
32
, to the gate line
3
, as shown in FIG.
6
. Subsequently, using a fifth mask pattern, a transparent electrode material is provided to form a first transparent electrode
35
for the charging capacitor Cst. After the first transparent electrode
35
is provided, a storage insulation film (i.e., dielectric layer)
36
for forming the charging capacitor Cst is provided. A transparent electrode material is then provided on the storage insulation film
36
. The transparent electrode material is then etched using a sixth mask pattern to form a second transparent electrode
38
. A protective film
40
is then formed. The second transparent electrode
38
serves as an etch stopper for limiting an etching depth of the protective film
40
when forming a contact hole through the protective film
40
. In other words, the second transparent electrode
38
protects the storage insulation film
36
in a process of selectively etching the protective film
40
and the storage insulation film
36
when forming of the contact hole. After the second transparent electrode
38
is provided, the protective film
40
of an inorganic or organic material is formed on the entire surface and then patterned using a seventh mask pattern, thereby forming the contact hole
15
for connection between the source electrode
14
and the pixel electrode
5
, the contact holes for connection between each of the gate pad
18
and the data pad
20
and the driver IC chip, and the contact hole for connection between the pixel electrode
5
and the second transparent electrode
38
. The contact hole
15
for connection between the source electrode
14
and the pixel electrode
5
and the contact holes
17
a
Clark Jasmine
LG.Philips LCD Co. , Ltd.
McKenna Long & Aldridge LLP
LandOfFree
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