Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2005-11-08
2005-11-08
Nguyen, Viet Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Testing
C365S051000, C365S042000, C365S094000
Reexamination Certificate
active
06963513
ABSTRACT:
The present invention provides a technology capable of shortening a TAT of a microcomputer with a nonvolatile memory built therein and achieving a reduction in cost. Flash ROMs comprising memory cells each substantially identical in structure to each of memory cells of a flash memory are formed in their corresponding chips lying in a wafer. Subsequently, memory information is written into each of the memory cells of the flash ROM in a probe test process. Thereafter, the memory information written into the memory cell thereof is made unreprogrammable to thereby disable rewriting of the post-shipment memory information. Thus, the shortening of a TAT can be achieved as compared with a mask ROM built-in microcomputer, and management and fabrication costs can be reduced.
REFERENCES:
patent: 5581510 (1996-12-01), Furusho et al.
patent: 5726920 (1998-03-01), Chen et al.
patent: 6180425 (2001-01-01), Mielke et al.
patent: 6181615 (2001-01-01), Chhor
patent: 6198657 (2001-03-01), Uekubo et al.
patent: 6367042 (2002-04-01), Phan et al.
patent: 6412072 (2002-06-01), Little et al.
patent: 6436741 (2002-08-01), Sato et al.
patent: 6473345 (2002-10-01), Hayasaka et al.
patent: 6551844 (2003-04-01), Eldridge et al.
patent: 6580092 (2003-06-01), Tomishima
patent: 6597602 (2003-07-01), Imamiya et al.
patent: 6661712 (2003-12-01), Hiraki et al.
patent: 6815322 (2004-11-01), Yamamoto et al.
patent: 6825052 (2004-11-01), Eldridge et al.
patent: 6829737 (2004-12-01), McBride
patent: 6885599 (2005-04-01), Saitoh et al.
patent: 2002/0097611 (2002-07-01), Hayasaka et al.
patent: 2003/0122550 (2003-07-01), Kanamaru et al.
patent: 2004/0181724 (2004-09-01), McBride
patent: 59-222952 (1984-12-01), None
patent: 4-78173 (1992-03-01), None
patent: 05-304277 (1993-11-01), None
patent: 07-283287 (1995-10-01), None
Satou Shouji
Yamamoto Toshitaka
Miles & Stockbridge P.C.
Nguyen Viet Q.
Renesas Technology Corp.
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