Semiconductor device manufacturing: process – Semiconductor substrate dicing – With attachment to temporary support or carrier
Reexamination Certificate
2007-04-16
2009-12-08
Garber, Charles D. (Department: 2812)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
With attachment to temporary support or carrier
C438S460000, C438S465000, C228S180220
Reexamination Certificate
active
07629231
ABSTRACT:
A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum chucking a chip is constructed of two systems. That is, the vacuum supply line is so structured that a first pipe and a second pipe connect to the vacuuming collet. The first pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is unstuck from a dicing tape and transported to a mounting position on a wiring substrate. The second pipe supplies the vacuuming collet with a vacuum that provides suction force when a chip is mounted over a wiring substrate. The intensity of the vacuum (suction force) supplied to the vacuuming collet is controlled by opening or closing valves respectively installed in the pipes.
REFERENCES:
patent: 6619535 (2003-09-01), Imanishi et al.
patent: 7015071 (2006-03-01), Wada et al.
patent: 7115482 (2006-10-01), Maki et al.
patent: 2005/0059205 (2005-03-01), Maki et al.
patent: 2005/0061856 (2005-03-01), Maki et al.
patent: 1 321 966 (2003-06-01), None
patent: 2002-280398 (2002-09-01), None
patent: 2003-203964 (2003-07-01), None
patent: 2004-6599 (2004-01-01), None
patent: 2004-022995 (2004-01-01), None
patent: 2004-128339 (2004-04-01), None
patent: 2004-228255 (2004-08-01), None
patent: 2004-304066 (2004-10-01), None
patent: 2005-093838 (2005-04-01), None
patent: 2005-117019 (2005-04-01), None
patent: 2005-150311 (2005-06-01), None
patent: 2005-322815 (2005-11-01), None
patent: 2006-24729 (2006-01-01), None
Fukasawa Haruhiko
Maki Hiroshi
Makita Yoshiaki
Mochizuki Masayuki
Nadamoto Keisuke
Abdelaziez Yasser A
Garber Charles D.
Miles & Stockbridge P.C.
Renesas Technology Corp.
LandOfFree
Fabrication method of semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fabrication method of semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabrication method of semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4147306