Fabrication method of semiconductor device

Details Fabrication method of semiconductor device Fabrication method of semiconductor device

1996-11-21

2000-04-25

Everhart, Caridad

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438692, 438640, H01L 214763

Patent

active

060543833

ABSTRACT:
A fabrication method of a semiconductor device is provided, which enables the formation of a conductive plug in an opening of an interlevel dielectric layer without arising any void. After a first wiring layer is formed on a first interlevel electric layer, a second interlevel dielectric layer is formed on the first interlevel dielectric layer to cover the first wiring layer. A first opening is formed in the second interlevel dielectric layer. A first conductive layer is formed on or over the second interlevel dielectric layer to cover the first opening. A first protection layer is formed on the first conductive layer to cover a first depressed part of the first conductive layer. The first protection layer having a first buried part on the first depressed part. The first protection layer and the first conductive layer are polished by a CMP process until the second interlevel dielectric layer is exposed, thereby selectively leaving the first depressed part within the first opening. The first depressed part left within the first opening constitutes a first conductor plug for electrically interconnecting the first wiring layer with a second wiring layer formed to be contacted with the fist conductor plug.

REFERENCES:
patent: 5244534 (1993-09-01), Yu et al.
patent: 5403779 (1995-04-01), Joshi et al.
patent: 5618381 (1997-04-01), Doan et al.
patent: 5658830 (1997-08-01), Jeng

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