Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-04-19
2002-11-19
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S514000, C438S520000, C438S523000, C438S528000, C438S533000, C438S655000, C438S659000, C438S682000, C438S627000, C438S630000
Reexamination Certificate
active
06482737
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a fabrication method of a semiconductor device, and particularly to a fabrication method for forming plug electrodes as wiring between MOS field effect transistor (MOSFET) elements having gates, sources, and drains that are converted to a silicide with self alignment. The present invention further relates to a transistor fabrication method in which, when forming a diffusion barrier layer of a plug electrode material, which is wiring between MOS field effect transistor (MOSFET) elements, by a high-temperature sputtering method, the adhesion between a metal silicide film and the diffusion barrier layer of the plug electrode material is improved, and a diffusion barrier layer of a plug electrode material having highly uniform low resistance is formed.
2. Description of the Related Art
One method of fabricating a semiconductor device consists in forming a plug electrode as the wiring between MOS field effect transistor (MOSFET) elements. The procedures of this fabrication method are explained with reference to the sectional views of
FIGS. 1A
to
1
F.
First, as shown in
FIG. 1A
, n-well
202
is formed in silicon substrate
201
by a known method. Field oxide film
203
is next formed by a selective oxidation method. Gate insulation film
204
, for example, a silicon oxide film are made up by turn, and a polycrystalline silicon are successively grown on the active region that is surrounded by this field oxide film
203
, and the polycrystalline silicon is doped with phosphorus by a known method to decrease the electrical resistance of the polycrystalline silicon.
The polycrystalline silicon is next patterned by the known methods of photolithography and dry etching to form gate electrode
205
, as shown in FIG.
1
A. Next, a low-concentration n-type impurity layer (not shown) and a low-concentration p-type impurity layer (not shown) are formed by photolithography and ion implantation. Side wall spacers
206
composed of a silicon oxide film or a silicon nitride film are next formed on the sides of gate electrode
205
using a known CVD method and an etching method.
A source-drain region of an n-type impurity layer and a source-drain region of a p-type impurity layer are next formed by photolithography and ion implantation. By these processes, n-type source-drain region
207
and p-type source-drain region
208
are formed as an LDD (lightly doped drain )structure.
Next, after removing the native oxide film (not shown) on the silicon substrate surface and on the surface of the polycrystalline silicon, which is the gate electrode, cobalt silicide film
209
is formed with self-alignment only over the gate electrode and diffusion layer according to a known method, as shown in FIG.
1
B.
An insulating film such as a silicon oxide film is next grown using a known CVD (chemical vapor deposition) method, and the insulating film surface is then leveled using a known CMP (chemical mechanical polishing) method. The insulating film is next patterned using known photolithography and dry etching methods, and plug hole
210
is then formed for forming a plug electrode, as shown in FIG.
1
C.
After cleaning the silicon substrate with, for example, a mixed solution of dilute sulfuric acid and hydrogen peroxide, the native oxide film (not shown in the figure) that has formed on the surface of the silicon substrate is removed by a known RF (radio frequency) sputtering method in an RF sputtering chamber which is attached to a sputtering device using plasma in which oxygen is mixed. At this time, a portion of cobalt silicide film
209
that is present at the bottom of plug hole
210
is etched as shown in FIG.
1
D.
Titanium film
211
is next grown as shown in
FIG. 1E
by a sputtering method in an argon plasma atmosphere and under a heating condition of 300° C. in a chamber of a sputtering device other than the above-described RF sputtering chamber. Still further, titanium is sputtered using a known reactive sputtering method under a heat condition of at least 300° C. in a mixed argon-nitrogen gas plasma atmosphere to form titanium nitride film
212
on the silicon substrate. A Rapid Thermal Annealing process (RTA) is then carried out to form titanium silicide film
213
at the interface of titanium film
211
and cobalt silicide film
209
.
After cleaning the silicon substrate with, for example, an aqueous mixed solution of dilute sulfuric acid and hydrogen peroxide, a tungsten film is grown using a known CVD method, following which the surface of the tungsten film is leveled using a known CMP method to form plug electrode
214
as shown in FIG.
1
F.
The above-described method of fabricating a semiconductor device was employed to convert the polycrystalline silicon of a p-type electrode that had been doped with boron ions at a high concentration of 3×1015 atoms/cm2 to cobalt silicide and then form a plug electrode above it. Subsequent measurement of the sheet resistance of the plug portion showed that the sheet resistance was at least 11 &OHgr;/(unit area), and a comparison of the sheet resistance within the silicon substrate surface revealed a variation of at least 3 &OHgr;. Similarly, a p-type diffusion layer electrode was converted to cobalt silicide and a plug electrode then formed above it. Subsequent measurement of the sheet resistance of the plug portion showed a sheet resistance of at least 11 &OHgr;/(unit area), while a comparison of the sheet resistance within the silicon substrate surface revealed a variation of at least 6 &OHgr;/(unit area).
The above-described method of fabricating a semiconductor device was also employed to convert the polycrystalline silicon of an n-type gate electrode on the silicon substrate that was doped with arsenic ions at a high concentration of 5×1015 atoms/cm2 to cobalt silicide and then form a plug electrode above it. Subsequent measurement of the sheet resistance of the plug portion showed that the sheet resistance was at least 10 &OHgr;/(unit area), and a comparison of the sheet resistance within the silicon substrate surface revealed a variation of at least 4 &OHgr;/(unit area). Similarly, when a p-type diffusion layer electrode was converted to cobalt silicide and a plug electrode formed above it, subsequent measurement of the sheet resistance of the plug portion showed a sheet resistance of at least 10 &OHgr;/(unit area), and a comparison of the sheet resistance within the silicon substrate revealed a variation of at least 4 &OHgr;/(unit area).
SUMMARY OF THE INVENTION
In the above-described fabrication method of a semiconductor device, the sheet resistance of a plug electrode was high and the variation within the surface was large. It is therefore an object of the present invention to provide a fabrication method of a semiconductor device for forming on a silicide film a refractory metal film having lower resistance than the prior art.
As the result of continued research to realize a fabrication method of a semiconductor device that can achieve the above-described object of the present invention, the inventors of the present invention discovered that the increased sheet resistance of the plug portion and the large variation of sheet resistance within the surface both result from etching a portion of the metal silicide film by the RF sputtering method that is carried out immediately before growing the titanium film that is to serve as the diffusion barrier layer of the plug electrode.
As a result of further research, the inventors of the present invention also discovered that, in a case in which the titanium film is grown without carrying out the above-described RF sputtering method before depositing the titanium film that serves as the diffusion barrier layer of the plug electrode, a titanium silicide film is not formed at the interface of the titanium film and metal silicide film. As a result, the sheet resistance of the plug portion is further increased, variation within the surface becomes larger, and adhesion between the titanium film and metal s
Katten Muchin Zavis & Rosenman
NEC Corporation
Nguyen Thanh
Nguyen Tuan H.
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