Fabrication method of an interconnect

Details Fabrication method of an interconnect Fabrication method of an interconnect

1999-06-28

2000-12-26

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438636, 438672, 438637, H01L 214763

Patent

active

061658952

ABSTRACT:
A method of fabricating an interconnect is described in which a conductive layer, an anti-reflection layer and a cover layer are sequentially formed on the substrate to form a conductive plug with its bottom situated in the anti-reflection layer. The cover layer and a portion of the anti-reflection layer and the conductive layer are remove to form an opening exposing the substrate and to define the conductive lining structures. A conformal polysilicon oxide layer is formed on the substrate and a first dielectric layer is also formed, filling the opening. A conformal isolation layer is then formed on the substrate, followed by forming a second dielectric layer covering the entire substrate. A planarization procedure is further conducted to expose the conductive plug.

REFERENCES:
patent: 4974055 (1990-11-01), Haskell
patent: 5116463 (1992-05-01), Lin et al.
patent: 5776829 (1998-07-01), Homma et al.

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