Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2001-01-24
2003-02-11
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S253000, C438S756000
Reexamination Certificate
active
06518142
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a MIM (Metal-Insulator-Metal) capacitive circuit in which a lower electrode and an upper electrode confront each other through a capacitive film.
2. Description of the Related Art
Circuits that are currently in use have a variety of configurations according to various purposes. For example, capacitive circuits are used to temporarily hold voltage. These capacitive circuits also have a variety of constructions, one example being the MIM capacitive circuit, which is a micro capacitive circuit that employs thin-film technology. In this circuit, a lower electrode and an upper electrode confront each other through a capacitive film. The lower electrode, the capacitive film, and the upper electrode can be micro-formed by employing thin-film technology.
Referring now to
FIG. 1A
to
FIG. 6
, one example of this type of MIM capacitive circuit of the prior art will be described.
FIG. 1A
to
FIG. 5B
are process figures showing the progression of fabrication steps of a MIM capacitive circuit, and
FIG. 6
is a flow chart of this process.
As shown in
FIG. 5B
, prior-art MIM capacitive circuit
100
that is here taken as an example includes silicon substrate
101
and interlayer dielectric films
102
and
103
that are composed of the dielectric material silicon dioxide (SiO
2
) and that are formed on the surface of this silicon substrate
101
.
Lower wiring
104
composed of the metal tungsten (W) is embedded in lower interlayer dielectric film
102
, and lower electrode
105
composed of the metal titanium nitride (TiN) is embedded in upper interlayer dielectric film
103
. This lower electrode
105
is formed in a concave shape, and lower wiring
104
is connected to its lower surface.
Capacitive film
106
composed of the dielectric material tantalum oxide (Ta
2
O
5
) is layered on the surface of lower electrode
105
, and upper electrode
107
composed of titanium nitride (TiN) is layered on the surface of capacitive film
106
. Upper wiring
108
is connected to the upper surface of upper electrode
107
, and upper wiring
108
and lower wiring
104
are connected to an external circuit (not shown in the figures).
In MIM capacitive circuit
100
of the above-described construction, conductive lower electrode
105
and upper electrode
107
confront each other through dielectric capacitive film
106
, and MIM capacitive circuit
100
is thus able to hold charge in this portion.
Next, regarding the circuit fabrication method for fabricating MIM capacitive circuit
100
of the above-described construction, interlayer dielectric film
102
composed of a silicon dioxide (SiO
2
) film is firstly formed to a thickness of 0.7 &mgr;m on the surface of silicon substrate
101
in Step
1
, as shown in FIG.
1
A. This interlayer dielectric film
102
is then patterned by, for example, a photolithographic technique and contact hole
111
is then formed to reach as far as the surface of silicon substrate
101
.
In Step
2
, titanium film
112
is formed to a thickness of 100 Å on the bottom surface of contact hole
111
and the upper surface of interlayer dielectric film
102
by a CVD (Chemical Vapor Deposition) method, as shown in FIG.
1
B. Titanium nitride film
113
is further grown to a thickness of 100 Å by a CVD method on the inner surfaces of contact hole
111
and on titanium film
112
on the upper surface of interlayer dielectric film
102
.
Alternatively, titanium film
112
having a thickness of 300 Å may be formed by a PVD (Physical Vapor Deposition) method on the inner surfaces of contact hole
111
and on the upper surface of interlayer dielectric film
102
, following which titanium nitride film
113
is grown to a thickness of 500 Å.
Next, in Step
3
, tungsten (W) film
114
having a thickness of 400 Å is formed by a CVD method on the surface of titanium nitride film
113
as shown in FIG.
1
C. At this time, tungsten film
114
is formed thicker in some portions such that tungsten film
114
fills the inside of contact hole
111
. Then, as shown in
FIG. 1D
, tungsten film
114
, titanium nitride film
113
, and titanium film
112
are removed only above interlayer dielectric film
102
by a CMP (Chemical Mechanical Polishing) method, thus completing the formation of lower wiring
104
.
Next, in Step
4
, SiON film
115
having a thickness of 500 Å and interlayer dielectric film
103
composed of silicon dioxide (SiO
2
) and having a thickness of 1.5 &mgr;m are successively formed by plasma CVD method on the upper surface of interlayer dielectric film
102
that has been leveled by the CMP method, as shown in FIG.
2
A. Then, in Step
5
, upper interlayer dielectric film
103
is patterned by, for example, a photolithographic process, and wide hole
116
is formed as far as lower interlayer dielectric film
102
and the upper surface of lower wiring
104
as shown in FIG.
2
B.
In Step
6
, titanium nitride (TiN) film
117
having a thickness of 100 Å to 300 Å is grown by a CVD method on the inside surfaces of this hole
116
and the upper surface of interlayer dielectric film
103
as shown in FIG.
2
C. In Step
7
, the inside of hole
116
is next filled by photoresist
118
with titanium nitride film
117
interposed as shown in FIG.
3
A.
As one example of the conditions of the CVD method for growing titanium nitride film
117
, the rates of flow of reaction gases TiCl
4
, NH
3
, N
2
are 10 to 40 sccm (standard cc/min), 100 to 600 sccm, and 500 sccm, respectively; the pressure is 0.3 torr, and the temperature is 600° C.
In Step
8
, titanium nitride film
117
is etched only above interlayer dielectric film
103
without removing photoresist
118
, as shown in
FIG. 3B
, thus forming lower electrode
105
in a concave shape. In Step
9
, photoresist
118
inside this lower electrode
105
is removed by ashing and organic stripping as shown in FIG.
3
C.
As one example of the conditions of this ashing, the rates of flow of reaction gases O
2
and N
2
are 1000 to 3000 sccm and 100 to 200 sccm, respectively, the pressure is 1 to 5 torr, the temperature is 200 to 300° C., and the electrical power is 1000 W. In addition, the organic stripping carried out in this case is a process in which, after removing photoresist
118
by ashing, deposition or residual photoresist
118
is removed by a mixed aqueous solution of dimethyl sulfoxide and ammonium fluoride. Next, in Step
10
, tantalum oxide (Ta
2
O
5
) film
119
having a thickness of 50 to 200 Å, titanium nitride (TiN) film
120
having a thickness of 100 to 300 Å, and tungsten (W) film
121
having a thickness of 1000 Å are successively grown by a CVD method on the inner surfaces of lower electrode
105
and the upper surface of interlayer dielectric film
103
as shown in
FIG. 4A
,
FIG. 4B
, and FIG.
5
A.
As one example of the conditions of the CVD method for growing tantalum oxide film
119
, the flow rates of the reaction gases Ta(OC
2
H
5
)
5
and O
2
are 0.1 sccm and 2000 sccm respectively, the pressure is 0.5 torr, and the temperature is 450° C. As one example of the conditions of the CVD method for growing titanium nitride film
120
, the reaction gas is TDMAT (tetrakis-dimethylamino-titanium) from an organic source at a pressure of 1.5 torr and a temperature of 450° C.
In Step
11
, capacitive film
106
, upper electrode
107
, and upper wiring
108
are formed as shown in
FIG. 5B
by patterning tantalum oxide film
119
, titanium nitride film
120
and tungsten film
121
that overlie interlayer dielectric film
103
to the same shape by using, for example, a photolithographic process.
Conductive lower electrode
105
and upper electrode
107
confront each other through dielectric capacitive film
106
, and MIM capacitive circuit
100
of the above-described construction therefore can hold a charge in this portion. When the inventors of this invention actually constructed MIM capacitive circuit
100
of the above-described confi
NEC Corporation
Nguyen Tuan H.
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