Fabrication method for heterojunction bipolar transistor

Details Fabrication method for heterojunction bipolar transistor Fabrication method for heterojunction bipolar transistor

2005-04-19

2005-04-19

Nguyen, Tuan H. (Department: 2813)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Having heterojunction

C438S321000

Reexamination Certificate

active

06881640

ABSTRACT:
A fabrication method for heterojunction bipolar transistor is disclosed. The method uses ISSG oxide instead of conventional PECVD oxide so that the base/emitter interface damage can be reduced. Moreover, the invention replaces the conventional emitter-window/space mask with an emitter-window reverse-tone mask/line mask to minimize the critical dimension of emitter window. Furthermore, the invention also utilizes a two-steps extrinsic base implantation to form two extrinsic bases with different dopant concentrations so that the base resistance can be reduced.

REFERENCES:
patent: 6384469 (2002-05-01), Chantre
patent: 6812107 (2004-11-01), Schuegraf
patent: 20040135179 (2004-07-01), Kalburge et al.

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