Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-11-12
2000-12-12
Smith, Matthew
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438619, 438421, 438422, H01L 214763
Patent
active
061598402
ABSTRACT:
A fabrication method for a dual damascene structure comprising an air-gap is provided. The method includes forming sequentially a first dielectric layer, a stop layer and a second dielectric layer on a substrate comprising a first metal layer. The first and the second dielectric layers are then defined to form a via. opening exposing the first metal layer and an opening in a predetermined position on the first and second dielectric layers. An oxide layer is then formed on the second dielectric layer covering the opening and forming a gap. The oxide layer and the second dielectric layer are then defined to form a trench, which exposes the first metal layer. A second metal layer and a via plug are then formed in the trench and the via. opening, wherein the second metal layer and the first metal layer are electrically connected through the via plug.
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patent: 5306659 (1994-04-01), Beyer et al.
patent: 5310700 (1994-05-01), Lien et al.
patent: 5882996 (1999-03-01), Dai
patent: 5935868 (1999-08-01), Fang et al.
Rocchegiani Renzo
Smith Matthew
United Microelectronics Corp.
United Semiconductor Corp.
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