Fabrication method for a damascene bit line contact plug

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S312000, C430S316000

Reexamination Certificate

active

10715616

ABSTRACT:
A fabrication method for a damascene bit line contact plug. A semiconductor substrate has a first gate conductive structure, a second gate conductive structure and a source/drain region formed therebetween. A first conductive layer is formed in a space between the first gate conductive structure and the second gate conductive structure to be electrically connected to the source/drain region. An inter-layer dielectric with a planarized surface is formed to cover the first conductive layer, the first gate conductive structure, and the second gate conductive structure. A bit line contact hole is formed in the inter-layer dielectric to expose the top of the first conductive layer. A second conductive layer is formed in the bit line contact hole, in which the combination of the second conductive layer and the first conductive layer serves as a damascene bit line contact plug.

REFERENCES:
patent: 5663092 (1997-09-01), Lee
patent: 6548394 (2003-04-01), Peng et al.
patent: 6713335 (2004-03-01), Yen et al.
patent: 2004/0092070 (2004-05-01), Hsu et al.

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