Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-06-25
2003-11-25
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
Reexamination Certificate
active
06653235
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a fabricating process for forming multi-layered metal bumps by electroless plating, and more particularly, to a fabricating process for forming metal bumps with sufficient height and good coverage, which is applicable to the packages of LCDs, ICs, and radio frequency (RF) devices by using an an-isotropic conductive film.
2. Description of the Prior Art
In recent years, the state-of-the-art semiconductor related techniques have developed rapidly and competitively. All the leading manufacturers have made efforts in developing IC components with lower costs, smaller sizes, and higher performances. In addition to the leading technologies for 12-inch silicon wafer and deep sub-micron fabrication, the package technology has become a more important issue as well. Conventional package techniques such as lead frame package (LFP), ball grid array (BGA) package, and tape automatic bonding (TAB) package have been improved to allow IC components to have smaller sizes, higher throughput and better performances.
In the prior art, an an-isotropic conductive film is used in the packages of LCDs, ICs, and radio frequency (RF) devices. The an-isotropic conductive film has a design that a plurality of pads are located on an IC chip or a semiconductor substrate, and the pads are connected to the external circuit by using metal bumps. Therefore, different layouts can be implemented when any modification is required. To date, metal bumps are typically formed by using electroplating. However, metal bumps are individually plated. The fabrication cost increases and the throughput is limited when the plating uniformity is concerned. On the other hand, if a bump is formed on an IC chip, it should be fabricated in a wafer foundry, leading to more difficulty and complexity. In this manner, the fabrication yield is adversely affected, especially on a brittle III-V compound semiconductor wafer. Accordingly, a fabricating process has been provided by forming metal bumps on a package substrate instead of an IC chip. Conventionally, an an-isotropic conductive film is used in the packages of LCDs, ICs, and radio frequency (RF) devices by forming a Cu bump of over 20 &mgr;m in height. The growth rate of Cu film by electroless plating is about 4 &mgr;m/hr, which is not applicable when a film of such height/thickness is to be formed. Even when a thinner film is to be formed, electroless plating takes too much time and the film shows poor coverage.
Therefore, the present invention provides a simplified fabricating process for forming metal bumps that overcomes the difficulty and complexity in processing and allows batch production, which achieves the objects of high fabrication yield and low fabrication cost.
SUMMARY OF THE INVENTION
It is the primary object of the present invention to provide a low-cost fabricating process for forming multi-layered metal bumps by electroless plating, and more particularly, a fabricating process for forming metal bumps with sufficient height and good coverage, which is applicable to the packages of LCDs, ICs, and radio frequency (RF) devices by using an an-isotropic conductive film.
It is another object of the present invention to provide a fabricating process for forming multi-layered metal bumps by electroless plating, in which the metal bumps provide good electrical conductivity and RF characteristics so as to be applicable to RF device package.
In order to achieve the foregoing objects, the present invention provides a fabricating process for forming multi-layered metal bumps of Ni/Cu or Ni/Au by electroless plating, comprising the steps of:
providing an IC chip or a semiconductor substrate on which there are provided a plurality of pads;
dispensing a first dielectric layer, exposing the pads, roughing the surface to be redistributed by chemical or physical approaches, activating the surface in order to follow-up electroless plating deposition advantageously, such as Pd-activation, and dispensing a second dielectric layer so as to define a redistribution path;
depositing a conductive film on the redistribution path by electroless plating, in which the conductive film allows the positions of the pads to be changed so as to be connected to the external circuit;
forming a photoresist pattern, exposing a plurality of pre-determined positions on the conductive film so as to redistribute the positions for the metal bumps formed later;
performing activation on the pre-determined positions so as to generate an activator;
forming initial metal bumps of a pre-determined thickness on the pads by electroless plating;
removing the photoresist pattern, completely exposing the metal bumps;
dispensing a third dielectric layer, having a thickness less than the height of the metal bumps and a window more than the size of the metal bumps, so as to expose the metal bumps; and
forming a peripheral metal layer covering the periphery of the metal bumps, in which the conductivity and the RF characteristics of the peripheral metal layer are better than those of the metal bumps so as to be electrically connected to the conductive film.
The present invention is characterized in that the fabricating process for forming multi-layered metal bumps by electroless plating can be applicable to RF device package by forming metal bumps having sufficient height, good coverage, good conductivity and excellent RF characteristics.
REFERENCES:
patent: 5172473 (1992-12-01), Burns et al.
patent: 6346472 (2002-02-01), Lopatin et al.
Chiang Pang-Min
Liang Muh-Wang
Tseng Yi-Hsiu
Coleman W. David
Industrial Technology Research Institute
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