Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-08-10
2001-10-30
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S624000, C438S633000, C438S667000, C438S926000
Reexamination Certificate
active
06309956
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the field of semiconductor processing. More specifically, this invention relates to an apparatus and method for avoiding dishing, improving the heat transfer characteristics, and structurally strengthening a multilayer dielectric structure with a low dielectric constant material layer.
2. Description of Related Art
A semiconductor integrated circuit is built by layering electrically conductive materials patterned in electrical circuitry over a semiconductor substrate. The electrically conductive materials are in separate planes, with electrical interconnects connecting the various layers of conductive materials. Insulating material is held between the planes of electrically conductive material and around the interconnects. Typically, the same insulating material is also used within the trenches of the electrically conductive material layers. The traditionally used insulating material is a silicon dioxide, having a dielectric constant (k) of approximately four. Silicon dioxide is a useful insulating material because it is thermally stable, and mechanically strong. A second advantage of using silicon dioxide is that the process techniques, are well developed. One of those process techniques is the time needed to etch a layer in order to maintain planarization. However, better device performance may be achieved by replacing the silicon dioxide with a lower dielectric constant (“low k”) material using a low k material between conducting layers reduces the capacitance of the structure by reducing the resistance-capacitance time constant. Thus reducing device capacitance increases device speed. Organic polymer with its lower dielectric constant is one potential replacement of silicon dioxide.
However, it has been found that using low k dielectric materials such as organic polymer as the insulating material in a semiconductor device is problematic. Silicon dioxide, the insulating material used in the prior art, is about 50 times harder than organic polymer. The elastic modulus of silicon dioxide is about 20 times greater than organic polymer. Thus organic polymer is mechanically weak compared with silicon dioxide. Thus organic polymer interlayers may not be strong enough to support adjacent materials. Furthermore the interlayers are under large thermal strain due to a significant thermal expansion mismatch between the silicon substrate and the organic polymer. The mismatch is typically twenty-five times larger than the mismatch between silicon and silicon dioxide. This thermal strain can cause reliability problems such as cracking or delamination in the structures adjacent to the organic polymer.
A second problem with using organic polymer as an insulating material is that organic polymer has a significantly lower thermal conductivity than silicon dioxide (3-30 times lower). Thus organic polymer dissipates heat poorly. Poor heat dissipation leads to heat build-up and to poor reliability in semiconductor integrated circuits.
A third problem results from the occasional use of spin-on techniques to deposit organic polymer interlayers instead of more traditional chemical vapor deposition (CVD) techniques. The planarity of a spin-on film strongly depends on the underlying feature size of the substrate. A fourth problem in the processing of semiconductor layers is dishing of the insulating material in open areas between structures. Thus a method or apparatus is needed to strengthen semiconductor interlayers, improve mechanical reliability, improve the heat dissipation characteristics, and minimize dishing between interconnects of semi-conductor devices using organic polymers as an insulating agent.
SUMMARY OF THE INVENTION
In one embodiment, the present invention is a semiconductor structure used to improve heat dissipation between interconnects. The apparatus utilizes a dummy structure adjacent a low dielectric constant material.
REFERENCES:
patent: 4902646 (1990-02-01), Nakano
patent: 5281555 (1994-01-01), Cho
patent: 5675187 (1997-10-01), Numata et al.
patent: 5686338 (1997-11-01), Liu
patent: 5744865 (1998-04-01), Jeng et al.
patent: 5786633 (1998-07-01), Wolfgang et al.
patent: 5798289 (1998-08-01), Yang et al.
patent: 5798298 (1998-08-01), Yang et al.
patent: 5811352 (1998-09-01), Numata et al.
patent: 5817568 (1998-10-01), Chao
patent: 5821621 (1998-10-01), Jeng
patent: 5882983 (1999-03-01), Gardener et al.
patent: 5915203 (1999-06-01), Sengupta et al.
patent: 5929528 (1999-07-01), Kinugawa
patent: 002 251 722 (1992-07-01), None
patent: 405 267 479 (1993-10-01), None
patent: 406 151 767 (1994-05-01), None
Chiang Chien
Fang Sychyi
Fraser David B.
Lee Jin
Mack Anne S.
Anya Igwe U.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Smith Matthew
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